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X1228V14IZ-2.7A PDF预览

X1228V14IZ-2.7A

更新时间: 2024-01-08 19:01:38
品牌 Logo 应用领域
英特矽尔 - INTERSIL 外围集成电路光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
29页 427K
描述
Real Time Clock/Calendar/CPU Supervisor with EEPROM

X1228V14IZ-2.7A 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP14,.25
针数:14Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.62Is Samacsys:N
最大时钟频率:0.032 MHz信息访问方法:I2C
中断能力:YJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:5 mm
湿度敏感等级:1端子数量:14
计时器数量:1最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3/5 V
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Timer or RTC最大供电电压:5.5 V
最小供电电压:2.7 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL最短时间:SECONDS
处于峰值回流温度下的最长时间:40易失性:YES
宽度:4.4 mmuPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCK
Base Number Matches:1

X1228V14IZ-2.7A 数据手册

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X1228  
PIN DESCRIPTIONS  
14 Ld TSSOP/SOIC  
V
V
1
X1  
X2  
NC  
NC  
NC  
14  
CC  
2
3
4
5
6
7
13  
12  
11  
10  
9
BACK  
PHZ/IRQ  
NC  
NC  
SCL  
SDA  
RESET  
8
V
SS  
NC = No internal connection  
PIN ASSIGNMENTS  
Pin Number  
SOIC/TSSOP Symbol  
Brief Description  
1
2
6
X1  
X1. The X1 pin is the input of an inverting amplifier. An external 32.768kHz quartz crystal  
is used with the X1228 to supply a timebase for the real time clock. The recommended crystal  
is a Citizen CFS206-32.768KDZF. Internal compensation circuitry is included to form a  
complete oscillator circuit. Care should be taken in the placement of the crystal and the layout  
of the circuit. Plenty of ground plane around the device and short traces to X1 are highly  
recommended. See Application section for more recommendations.  
X2  
X2. The X2 pin is the output of an inverting amplifier. An external 32.768kHz quartz crystal  
is used with the X1228 to supply a timebase for the real time clock. The recommended crystal  
is a Citizen CFS206-32.768KDZF. Internal compensation circuitry is included to form a  
complete oscillator circuit. Care should be taken in the placement of the crystal and the layout  
of the circuit. Plenty of ground plane around the device and short traces to X2 are highly  
recommended. See Application section for more recommendations.  
RESET  
RESET Output – RESET. This is a reset signal output. This signal notifies a host  
processor that the watchdog time period has expired or that the voltage has dropped below  
a fixed VTRIP threshold. It is an open drain active LOW output. Recommended value for the  
pullup resistor is 5k. If unused, tie to ground.  
7
8
VSS  
VSS.  
SDA  
Serial Data (SDA). SDA is a bidirectional pin used to transfer data into and out of the  
device. It has an open drain output and may be wire ORed with other open drain or open  
collector outputs. The input buffer is always active (not gated).  
An open drain output requires the use of a pull-up resistor. The output circuitry controls the  
fall time of the output signal with the use of a slope controlled pull-down. The circuit is  
designed for 400kHz 2-wire interface speeds.  
9
SCL  
Serial Clock (SCL). The SCL input is used to clock all data into and out of the device. The  
input buffer on this pin is always active (not gated).  
12  
PHZ/IRQ Programmable Frequency/Interrupt Output – PHZ/IRQ. This is either an output from the  
internal oscillator or an interrupt signal output. It is a CMOS output.  
When used as frequency output, this signal has a frequency of 32.768kHz, 4096Hz, 1Hz  
or inactive.  
When used as interrupt output, this signal notifies a host processor that an alarm has  
occurred and an action is required. It is an active LOW output.  
The control bits for this function are FO1 and FO0 and are found in address 0011h of the  
Clock Control Memory map. See “Programmable Frequency Output Bits—FO1, FO0” on  
page 14.  
13  
14  
VBACK  
VBACK. This input provides a backup supply voltage to the device. VBACK supplies power  
to the device in the event the VCC supply fails. This pin can be connected to a battery, a  
Supercap or tied to ground if not used.  
VCC  
VCC.  
FN8100.2  
3
October 17, 2005  

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