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W90N740 PDF预览

W90N740

更新时间: 2024-01-14 02:36:46
品牌 Logo 应用领域
华邦 - WINBOND 微控制器
页数 文件大小 规格书
39页 415K
描述
32-Bit ARM7TDMI-Based Micro-Controller

W90N740 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFP包装说明:LFQFP, QFP176,.87SQ,16
针数:176Reach Compliance Code:unknown
ECCN代码:3A991.A.2HTS代码:8542.31.00.01
风险等级:5.8Is Samacsys:N
具有ADC:NO其他特性:ALSO REQUIRES 3.3V SUPPLY
地址总线宽度:25位大小:32
CPU系列:ARM7最大时钟频率:30 MHz
DAC 通道:NODMA 通道:YES
外部数据总线宽度:32JESD-30 代码:S-PQFP-G176
JESD-609代码:e3长度:20 mm
湿度敏感等级:3I/O 线路数量:21
端子数量:176最高工作温度:70 °C
最低工作温度:PWM 通道:NO
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP176,.87SQ,16封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.8,3.3 V认证状态:Not Qualified
RAM(字节):10240ROM(单词):0
ROM可编程性:FLASH座面最大高度:1.6 mm
速度:80 MHz子类别:Microcontrollers
最大供电电压:1.98 V最小供电电压:1.62 V
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.4 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:20 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

W90N740 数据手册

 浏览型号W90N740的Datasheet PDF文件第2页浏览型号W90N740的Datasheet PDF文件第3页浏览型号W90N740的Datasheet PDF文件第4页浏览型号W90N740的Datasheet PDF文件第6页浏览型号W90N740的Datasheet PDF文件第7页浏览型号W90N740的Datasheet PDF文件第8页 
W90N740 Reference Manual  
External Bus Interface (EBI)  
External I/O Control with 8/16/32 bit external data bus  
Cost-effective memory-to-peripheral DMA interface  
SDRAM Controller supports up to 2 external SDRAM & the maximum size of each device is 32MB  
ROM/FLASH & External I/O interface  
Support for PCMCIA 16-bit PC Card devices  
On-Chip Instruction and Data Cache  
Two-way, Set-associative, 8K-byte I-cache and 2K-byte D-cache  
Support for LRU (Least Recently Used) Protocol  
Cache can be configured as an internal SRAM  
Support Cache Lock function  
Ethernet MAC Controller (EMC)  
IEEE 802.3 protocol engine with programmable MII or RMII interface for 10/100 Mbits/s  
DMA engine with burst mode  
256 bytes transmit & 256 bytes receive FIFO for MAC protocol engine and DMA access  
Built-in 16 entry CAM Address Register  
Support long frame (more than 1518 bytes) and short frame (less than 64 bytes)  
Re-transmit (during collision) the frame without DMA access  
Half or full duplex function option  
Support Station Management for external PHY  
On-Chip Pad generation  
NAT Accelerator (Patent Pending)  
Hardware acceleration on IP address / port number look up and replacement for network address  
translation, including MAC address translation  
Provide 64 entries of translation table  
Support TCP / UDP packets  
GDMA Controller  
2 Channel GDMA for memory-to-memory data transfers without CPU intervention  
Increase or decrease source / destination address in 8-bit, 16-bit, or 32-bit data transfers  
Supports 4-data burst mode to boost performance  
Support external GDMA request  
Publication Release Date: May 9, 2003  
- 5 -  
Revision A2  

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