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VCC6-RAA-153M6000 PDF预览

VCC6-RAA-153M6000

更新时间: 2023-05-15 00:00:00
品牌 Logo 应用领域
美高森美 - MICROSEMI 机械输出元件振荡器
页数 文件大小 规格书
7页 193K
描述
LVPECL Output Clock Oscillator, 153.6MHz Nom, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKAGE-6

VCC6-RAA-153M6000 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKAGE-6
Reach Compliance Code:compliant风险等级:5.68
其他特性:ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TAPE AND REEL最长下降时间:0.6 ns
频率调整-机械:NO频率稳定性:100%
JESD-609代码:e4安装特点:SURFACE MOUNT
标称工作频率:153.6 MHz最高工作温度:70 °C
最低工作温度:-10 °C振荡器类型:LVPECL
输出负载:50 OHM物理尺寸:7.0mm x 5.0mm x 1.6mm
最长上升时间:0.6 ns最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES最大对称度:55/45 %
端子面层:Gold (Au) - with Nickel (Ni) barrierBase Number Matches:1

VCC6-RAA-153M6000 数据手册

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LVPECL Application Diagrams  
Figure 7. Standard PECL Output Configuration Figure 8. Single Resistor Termination Scheme  
Figure 9. Pull-Up Pull Down Termination  
Resistor values are typically 120 to 240 ohms  
for 3.3V operation.  
Resistor values are typically 82 to 120 ohms  
for 2.5V operation.  
Resistor values are typically for 3.3V operation  
For 2.5V operation, the resistor to ground is 62  
ohms and the resistor to supply is 240 ohms  
The VCC6 incorporates a standard PECL output scheme, which are un-terminated emitters as shown in Figure 7. There are numerous application notes on  
terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 8, and a pull-up/pull-down scheme as  
shown in Figure 9. An AC coupling capacitor is optional, depending on the application and the input logic requirements of the next stage.  
LVDS Application Diagrams  
VCC  
LVDS  
Driver  
LVDS  
Receiver  
LVDS  
Driver  
Receiver  
100ȍ  
100ȍ  
OUT+  
OUT-  
Figure 11. LVDS to LVDS Connection, Internal 100ohm  
Some LVDS structures have an internal 100 ohm resistor on the  
input and do not need additional components.  
Figure 12. LVDS to LVDS Connection  
External 100ohm and AC blocking caps  
Some input structures may not have an internal 100 ohm  
resistor on the input and will need an external 100ohm  
resistor for impedance matching. Also, the input may have  
an internal DC bias which may not be compatible with  
LVDS levels, AC blocking capacitors can be used.  
Figure 10 Standard LVDS  
Output Configuration  
One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-termi-  
nated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching  
into account. Load matching and power supply noise are the main contributors to jitter related problems.  
Environmental and IR Compliance  
Table 4. Environmental Compliance  
Parameter  
Mechanical Shock  
Mechanical Vibration  
Temperature Cycle  
Solderability  
Condition  
MIL-STD-883 Method 2002  
MIL-STD-883 Method 2007  
MIL-STD-883 Method 1010  
MIL-STD-883 Method 2003  
MIL-STD-883 Method 1014  
MIL-STD-883 Method 2015  
MSL1  
Fine and Groossss LLeeaakk  
Resistance to Solvents  
Moisture Sensitivity Level  
Contact Pads  
Gold over Nickel  
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com  
Page5  

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