Datasheet > UT7R995-XCX

UT7R995-XCX

更新时间： 2024-02-15 08:31:15

品牌	Logo	应用领域
艾法斯 - AEROFLEX		晶体外围集成电路时钟
页数	文件大小	规格书
22页	174K
描述
RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

UT7R995-XCX 数据手册

Standard Products

UT7R995 & UT7R995C RadClock^TM

RadHard 2.5V/3.3V 200MHz High-Speed

Multi-phase PLL Clock Buffer

Datasheet

February, 2007

FEATURES:

The devices also feature split output bank power supplies that

ꢀ

+3.3V Core Power Supply

enable banks 1 & 2, bank 3, and bank 4 to operate at a different

power supply levels. The ternary PE/HD pin controls the syn-

chronization of output signals to either the rising or the falling

edge of the reference clock and selects the drive strength of the

output buffers. The UT7R995 and UT7R995C both interface

to a digital clock while the UT7R995C will also interface to a

quartz crystal.

+2.5V or +3.3V Clock Output Power Supply

- Independent Clock Output Bank Power Supplies

Output frequency range: 6 MHz to 200 MHz

Bank pair output-output skew < 100 ps

Cycle-cycle jitter < 50 ps

50% ± 2% maximum output duty cycle at 100MHz

Eight LVTTL outputs with selectable drive strength

Selectable positive- or negative-edge synchronization

Selectable phase-locked loop (PLL) frequency range and

lock indicator

ꢀ

Phase adjustments in 625 to 1300 ps steps up to ± 7.8 ns

(1-6,8,10,12) x multiply and (1/2,1/4) x divide ratios

Compatible with Spread-Spectrum reference clocks

Power-down mode

Selectable reference input divider

Radiation performance

4F0

4F1

sOE

3F1

3F0

- Total-dose tolerance: 100 krad (Si)

- SEL Immune to a LET of 109 MeV-cm /mg

- SEU Immune to a LET of 109 MeV-cm /mg

PD/DIV

PE/HD

ꢀ

Military temperature range: -55 C to +125 C

ꢀ

Extended industrial temp: -40 C to +125 C

Packaging options:

4Q1

4Q0

3Q1

3Q0

- 48-Lead Ceramic Flatpack

Standard Microcircuit Drawing: 5962-05214

- QML-Q and QML-V compliant part

ꢀ

UT7R995

UT7R995C

XTAL1

NC/XTAL2

INTRODUCTION:

The UT7R995/UT7R995C is a low-voltage, low-power, eight-

output, 6-to-200 MHz clock driver. It features output phase

programmability which is necessary to optimize the timing of

high-performance microprocessor and communication sys-

tems.

2Q1

2Q0

1Q1

1Q0

LOCK

TEST

2F1

2F0

The user programs both the frequency and the phase of the out-

put banks through nF[1:0] and DS[1:0] pins. The adjustable

phase feature allows the user to skew the outputs to lead or lag

the reference clock. Connect any one of the outputs to the

feedback input to achieve different reference frequency multi-

plication and division ratios.

DS0

DS1

1F0

1F1

Figure 1. 48-Lead Ceramic Flatpack Pin Description

12 3 4 5 6 7...22

中文翻译

下载PDF

与UT7R995-XCX相关器件

型号	品牌	获取价格	描述	数据表
UT7R995-XPA	AEROFLEX	获取价格	RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer
UT7R995-XPC	AEROFLEX	获取价格	RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer
UT7R995-XPX	AEROFLEX	获取价格	RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer
UT7R995-XWA	AEROFLEX	获取价格	RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer
UT7R995-XWC	AEROFLEX	获取价格	RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer
UT7R995-XWX	AEROFLEX	获取价格	RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer
UT80196	AEROFLEX	获取价格	20MHz 16-bit Microcontroller
UT8030	ETC	获取价格	Ultrasonic Cleaning
UT8060	ETC	获取价格	Ultrasonic Cleaning
UT8067	UTC	获取价格	N-CHANNEL MOSFET

与UT7R995-XCX相关文章

SL74HC10N：高性能三输入与非门解析
2024-09-03

36
AIC1781A 电池充电控制器深度解析
2024-09-03

24
Pickering新高压舌簧继电器亮相汽车测试博览会
2024-08-26

64
采用MCU+MPU双处理器架构实现的创新应用设计探索
2024-08-23

69

产品中心

服务支持

精选活动

关于我们

帮助中心

UT7R995-XCX

UT7R995-XCX 数据手册

与UT7R995-XCX相关器件

与UT7R995-XCX相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

UT7R995-XCX

UT7R995-XCX 数据手册

与UT7R995-XCX相关器件

与UT7R995-XCX相关文章

您还可以找

您在本页遇到什么问题？