UPG503B

更新时间： 2024-01-14 13:47:48

品牌	Logo	应用领域
日电电子 - NEC		预分频器时钟
页数	文件大小	规格书
4页	61K
描述
9 GHz DIVIDE-BY-4 DYNAMIC PRESCALER

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中文翻译

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数据手册

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UPG503B 数据手册

9 GHz DIVIDE-BY-4

DYNAMIC PRESCALER

UPG503B

INPUT POWER vs. INPUT FREQUENCY

FEATURES

DD = 3.8V

SS1 = 0V

SS2 = - 2.2 V

(VGG1,2 OPEN)

• WIDE OPERATING FREQUENCY RANGE:

= -25˚C

to +75˚C

f^IN= 3.5 to 9.0 GHz (TA = 25°C)

+10

Recommended

Operating

Region

• DIVISION RATIO OF 4

• GUARANTEED OPERATING TEMPERATURE RANGE:

-25°C to +75°C

= -25˚C

= +25˚C

= +75˚C

DESCRIPTION

-10

The UPG503B is a GaAs divide-by-4 prescaler that is capable

of operating up to 9 GHz. It is designed to be used in the

frequency synthesizers of microwave communication sys-

tems and measurement equipment. The UPG503B is a

dynamic divider. It employs buffered FET logic (BFL). The

UPG503B is available in a hermetic 8-lead ceramic flat

package.

Input Frequency, f (GHz)

ELECTRICAL CHARACTERISTICS¹(TA = 25°C, VDD = 3.8 V, VSS1 = 0 V, VSS2 = -2.2 V)

PART NUMBER

PACKAGE OUTLINE

UPG503B

BF08

SYMBOLS

PARAMETERS AND CONDITIONS

SupplyCurrent

UNITS

MIN

TYP

MAX

IDD

130

ISS1

ISS2

fIN(U)

Sink Current²ISS1 = IDD - ISS2

Sink Current²

Upper Limit of Input Frequency, PIN = +9 to +10 dBm

GHz

8.6

9.0

fIN(L)

Lower Limit of Input Frequency, PIN = +9 to +10 dBm

GHz

3.5

3.7

Input Power, fIN = 3.7 to 8.6 GHz

fIN = 5.0 to 7.4 GHz

dBm

9.0

3.0

10.0

POUT

OutputPower, fIN = 8.6 GHz, PIN = +10 dBm

fIN = 3.7 GHz, PIN = +10 dBm

dBm

RTH

Thermal Resistance, Channel to Case

°C/W

Note:

1.Device may exhibit low frequency spur typically below 150 Hz and -45 dBm.

2. Current is positive into the IDD pin and returns through the ISS1 and ISS2 pins.

California Eastern Laboratories

12 3 4

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