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UPD780112GB-XXX-8ES PDF预览

UPD780112GB-XXX-8ES

更新时间: 2024-02-13 00:10:11
品牌 Logo 应用领域
日电电子 - NEC 时钟微控制器外围集成电路
页数 文件大小 规格书
431页 2614K
描述
Microcontroller, 8-Bit, MROM, 10MHz, CMOS, PQFP44, 10 X 10 MM, PLASTIC, LQFP-44

UPD780112GB-XXX-8ES 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:10 X 10 MM, PLASTIC, LQFP-44Reach Compliance Code:compliant
风险等级:5.85具有ADC:YES
其他特性:ALSO OPERATES AT 2.7V MINIMUM SUPPLY地址总线宽度:
位大小:8最大时钟频率:10 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:JESD-30 代码:S-PQFP-G44
JESD-609代码:e0长度:10 mm
I/O 线路数量:32端子数量:44
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not QualifiedROM可编程性:MROM
座面最大高度:1.6 mm速度:10 MHz
最大供电电压:5.5 V最小供电电压:4 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

UPD780112GB-XXX-8ES 数据手册

 浏览型号UPD780112GB-XXX-8ES的Datasheet PDF文件第1页浏览型号UPD780112GB-XXX-8ES的Datasheet PDF文件第2页浏览型号UPD780112GB-XXX-8ES的Datasheet PDF文件第4页浏览型号UPD780112GB-XXX-8ES的Datasheet PDF文件第5页浏览型号UPD780112GB-XXX-8ES的Datasheet PDF文件第6页浏览型号UPD780112GB-XXX-8ES的Datasheet PDF文件第7页 
NOTES FOR CMOS DEVICES  
1
PRECAUTION AGAINST ESD FOR SEMICONDUCTORS  
Note:  
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and  
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity  
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control  
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using  
insulators that easily build static electricity. Semiconductor devices must be stored and transported  
in an anti-static container, static shielding bag or conductive material. All test and measurement  
tools including work bench and floor should be grounded. The operator should be grounded using  
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need  
to be taken for PW boards with semiconductor devices on it.  
2
HANDLING OF UNUSED INPUT PINS FOR CMOS  
Note:  
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided  
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence  
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels  
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused  
pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of  
being an output pin. All handling related to the unused pins must be judged device by device and  
related specifications governing the devices.  
3
STATUS BEFORE INITIALIZATION OF MOS DEVICES  
Note:  
Power-on does not necessarily define initial status of MOS device. Production process of MOS  
does not define the initial operation status of the device. Immediately after the power source is  
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does  
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the  
reset signal is received. Reset operation must be executed immediately after power-on for devices  
having reset function.  
Windows and Windows NT are either registered trademarks or trademarks of Microsoft Corporation in the  
United States and/or other countries.  
PC/AT is a trademark of International Business Machines Corporation.  
HP9000 series 700 and HP-UX are trademarks of Hewlett-Packard Company.  
SPARCstation is a trademark of SPARC International, Inc.  
Solaris and SunOS are trademarks of Sun Microsystems, Inc.  
Ethernet is a trademark of Xerox Corp.  
OSF/Motif is a trademark of Open Software Foundation, Inc.  
TRON stands for The Realtime Operating system Nucleus.  
ITRON is an abbreviation of Industrial TRON.  
3
Preliminary User’s Manual U16227EJ1V0UD  

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