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UPD70F3015BYGC-8EU PDF预览

UPD70F3015BYGC-8EU

更新时间: 2024-02-04 07:32:15
品牌 Logo 应用领域
日电电子 - NEC 微控制器外围集成电路时钟
页数 文件大小 规格书
48页 406K
描述
32-BIT SINGLE-CHIP MICROCONTROLLER

UPD70F3015BYGC-8EU 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:14 X 14 MM, PLASTIC, LQFP-100Reach Compliance Code:compliant
风险等级:5.81Is Samacsys:N
具有ADC:YES其他特性:OPERATES AT 2.7V MINIMUM SUPPLY @ 17 MHZ
地址总线宽度:21位大小:32
最大时钟频率:20 MHzDAC 通道:NO
DMA 通道:YES外部数据总线宽度:16
JESD-30 代码:S-PQFP-G100JESD-609代码:e0
长度:14 mmI/O 线路数量:85
端子数量:100最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
ROM可编程性:FLASH座面最大高度:1.45 mm
速度:20 MHz最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:14 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

UPD70F3015BYGC-8EU 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD70F3015B, 70F3015BY, 70F3017A, 70F3017AY  
V850/SA1TM  
32-BIT SINGLE-CHIP MICROCONTROLLER  
DESCRIPTION  
The µPD70F3015B, 70F3015BY, 70F3017A, and 70F3017AY are products with on-chip flash memory. Because  
the devices can be programmed by the user on-board, they are ideal for the evaluation stages of system  
development, small-scale production of a variety of products, and rapid development of new products.  
The V850/SA1 provides a high-level cost performance ideal for applications ranging from low-power camcorders  
and other AV equipment to portable telephone equipment such as cellular phones and personal handyphone  
systems (PHS).  
Detailed function descriptions are provided in the following user's manuals. Be sure to read them before  
designing.  
V850/SA1 User's Manual Hardware:  
U12768E  
V850 FamilyTM User's Manual Architecture: U10243E  
FEATURES  
{ Number of instructions: 74  
{ External bus interface: 16-bit data bus  
Address bus: Separate output enabled  
{ Interrupts and exceptions  
External: 8, internal: 23, exceptions: 1  
{ I/O lines Total: 85  
{ Minimum instruction execution time:  
58.8 ns (@ 17 MHz operation with main system  
clock (fXX))  
50 ns (@ 20 MHz operation with main system  
clock (fXX))  
{ Timer/counters  
30.5 µs (@ 32.768 kHz operation with subsystem  
clock (fXT))  
16-bit timer: 2 channels  
8-bit timer:  
4 channels  
{ General-purpose registers: 32 bits × 32 registers  
{ Instruction set:  
{ Watch timer: 1 channel  
{ Watchdog timer: 1 channel  
Signed multiplication, saturation operations, 32-bit  
shift instructions, bit manipulation instructions,  
load/store instructions  
{ Serial interface (SIO)  
Asynchronous serial interface (UART)  
Clocked serial interface (CSI)  
I2C bus interface (µPD70F3015BY, 70F3017AY)  
{ A/D converter: 12 channels  
{ Memory space:  
16 MB linear address space  
Memory block division function: 2 MB per block  
{ Internal memory  
{ DMA controller: 3 channels  
{ RTP: 8 bits × 1 channel or 4 bits × 2 channels  
{ Power-saving functions: HALT/IDLE/STOP modes  
{ Packages: 100-pin plastic LQFP (14 × 14 mm)  
121-pin plastic FBGA (12 × 12 mm)  
Flash memory  
128 KB (µPD70F3015B, 70F3015BY)  
256 KB (µPD70F3017A, 70F3017AY)  
RAM  
4 KB (µPD70F3015B, 70F3015BY)  
8 KB (µPD70F3017A, 70F3017AY)  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No. U14527EJ3V0DS00 (3rd edition)  
Date Published July 2001 N CP(K)  
Printed in Japan  
The mark shows major revised points.  
©
2000  

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