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TDA4470-MFSG3Y PDF预览

TDA4470-MFSG3Y

更新时间: 2024-01-08 21:45:15
品牌 Logo 应用领域
爱特美尔 - ATMEL 光电二极管商用集成电路
页数 文件大小 规格书
24页 252K
描述
Audio/Video Demodulator, AM/FM, Bipolar, PDSO28, ROHS COMPLIANT, SSOP-28

TDA4470-MFSG3Y 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP28,.25
针数:28Reach Compliance Code:unknown
风险等级:5.55商用集成电路类型:AUDIO/VIDEO DEMODULATOR
解调类型:AM/FM谐波失真:1%
JESD-30 代码:R-PDSO-G28JESD-609代码:e3
长度:9.05 mm湿度敏感等级:1
功能数量:1端子数量:28
最高工作温度:85 °C最低工作温度:-10 °C
输出电压标称(AM):500 mV标称输出电压(调频):250 mV
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP28,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
信噪比Nom(FM):60 dB子类别:Other Consumer ICs
最大压摆率:93 mA最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):4.5 V表面贴装:YES
技术:BIPOLAR温度等级:COMMERCIAL EXTENDED
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

TDA4470-MFSG3Y 数据手册

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TDA4470  
2. Circuit Description  
2.1  
Vision IF Amplifier  
The video IF signal (VIF) is fed through a SAW filter to the differential input (pins 6-7) of the VIF  
amplifier. This amplifier consists of three AC-coupled amplifier stages. Each differential amplifier  
is gain controlled by the automatic gain control (VIF-AGC). The output signal of the VIF amplifier  
is applied to the FPLL carrier generation and the video demodulator.  
2.2  
Tuner-and VIF-AGC  
At pin 8, the VIF-AGC charges/discharges the AGC capacitor to generate a control voltage for  
setting the gain of the VIF amplifier and tuner in order to keep the video output signal at a con-  
stant level. Therefore, the synchronous level of the demodulated video signal is the criterion for  
a fast charge/discharge of the AGC capacitor. For positive modulation (e.g., L standard) the  
peak white level of the video signal controls the charge current. In order to reduce the reaction  
time for positive modulation, where a large time constant is needed, an additional black level  
detector controls the discharge current in the event of decreasing VIF input signal. The control  
voltage (AGC voltage at pin 8) is transferred to an internal control signal, and is fed to the tuner  
AGC to generate the tuner AGC current at pin 11 (open collector output). The take-over point of  
the tuner AGC can be adjusted at pin 10 by a potentiometer or an external DC voltage (from an  
interface circuit or microprocessor).  
2.3  
FPLL, VCO and AFC  
The FPLL (Frequency-Phase-Locked Loop) circuit consists of a frequency and phase detector to  
generate the control voltage for the VCO tuning. In locked mode, the VCO is controlled by the  
phase detector, in unlocked mode, the frequency detector is superimposed. The VCO operates  
with an external resonance circuit (L and C in parallel) and is controlled by internal varicaps. The  
VCO control voltage is also converted to a current and represents the AFC output signal at pin  
22. At the AFC switch (pin 19) three operating conditions of the AFC are possible: the AFC curve  
“rising” or “falling” and AFC “off”.  
A practicable VCO alignment of the external coil is the adjustment to zero AFC output current at  
pin 22. At the center frequency, the AFC output current is equal to zero. Furthermore, at pin 14,  
the VCO center frequency can be switched to set it to the required L’ value (L’ standard).  
The optional potentiometer at pin 26 allows an offset compensation of the VCO phase for  
improved sound quality (fine adjustment). Without a potentiometer (open circuit at pin 26), this  
offset compensation is not active.  
The oscillator signal passes a phase shifter and supplies the in-phase signal (0°) and the  
quadrature signal (90°) of the generated picture carrier.  
3
4803C–TVVCR–10/05  

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