Datasheet > TA8772ANG

TA8772ANG

更新时间： 2024-02-04 23:10:27

品牌	Logo	应用领域
东芝 - TOSHIBA		信息通信管理光电二极管商用集成电路电视
页数	文件大小	规格书
19页	346K
描述
IC,TV/VIDEO CIRCUIT,TV/VIDEO DELAY LINE CIRCUIT,BICMOS,SDIP,30PIN,PLASTIC

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中文翻译

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技术参数
数据手册

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TA8772ANG 技术参数

生命周期：	Obsolete	包装说明：	SDIP, SDIP30,.4
Reach Compliance Code：	unknown	风险等级：	5.81
商用集成电路类型：	CONSUMER CIRCUIT	JESD-30 代码：	R-PDIP-T30
端子数量：	30	最高工作温度：	65 °C
最低工作温度：	-20 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SDIP	封装等效代码：	SDIP30,.4
封装形状：	RECTANGULAR	封装形式：	IN-LINE, SHRINK PITCH
电源：	5,9 V	认证状态：	Not Qualified
子类别：	Other Consumer ICs	表面贴装：	NO
技术：	BICMOS	温度等级：	COMMERCIAL
端子形式：	THROUGH-HOLE	端子节距：	1.78 mm
端子位置：	DUAL	Base Number Matches：	1

TA8772ANG 数据手册

TA8772ANG

TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC

TA8772ANG

PAL / SECAM / NTSC BASE BAND 1H DELAY SYSTEM FOR COLOR TV OR VCR

The TA8772ANG has two chips, a bipolar chip and a CCD chip, in

a package.

CCD chip consist of two delaylines which operate to delay R-Y

and B-Y signal. Bipolar chip operate to control the signals which

is processed by CCD stage.

FEATURES

Bipolar stage

Weight: 1.99 g (typ.)

ꢀ

AGC circuit

L.P.F.

(For correcting output level)

(For reducing CCD clock)

DC clamp circuit

(For reducing the difference of DC l

ignal.)

vel between delay signal and direct

ꢀ

Mode SW

(For control output signal by PAL, NTSC or SECAM ident)

(For making CCD clock)

225f VCO circuit

CCD stage

ꢀ

CCD drive circuit

Sample & Hold circuit

Input bias circuit

Synctip clamp circuit

(This device’s dynamic range bear no relation to change of APL on adopt this circuit)

Delay time of 1H consist of supply 225f clock.

TOTAL

ꢀ

This device can operate by the smallest external parts because of include CCD drive circuit, bias generator

circuit and output amplifier for support CCD circuit.

2004-09-09

12 3 4 5 6 7...19

中文翻译

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