Table of Contents
1 Overview.............................................................................................. 3
3.18 I2C interface.............................................................................. 127
3.19 GPIO interface...........................................................................131
3.20 Display interface unit................................................................ 133
3.21 TDM interface........................................................................... 135
3.22 High-speed serial interfaces (HSSI).......................................... 137
4 Hardware design considerations...........................................................160
4.1 System clocking........................................................................ 160
4.2 Power supply design..................................................................170
4.3 Decoupling recommendations...................................................175
4.4 SerDes block power supply decoupling recommendations.......175
4.5 Connection recommendations................................................... 176
4.6 Thermal......................................................................................187
4.7 Recommended thermal model...................................................188
4.8 Temperature diode.....................................................................188
4.9 Thermal management information............................................ 189
5 Package information.............................................................................192
5.1 Package parameters for the FC-PBGA......................................192
5.2 Mechanical dimensions of the FC-PBGA................................. 192
6 Security fuse processor.........................................................................194
7 Ordering information............................................................................194
7.1 Part numbering nomenclature....................................................194
7.2 Part marking.............................................................................. 195
8 Revision history....................................................................................196
2 Pin assignments....................................................................................4
2.1 780 ball layout diagrams........................................................... 4
2.2 Pinout list...................................................................................10
3 Electrical characteristics.......................................................................46
3.1 Overall DC electrical characteristics.........................................46
3.2 Power sequencing......................................................................53
3.3 Power-down requirements.........................................................56
3.4 Power-on ramp rate................................................................... 57
3.5 Power characteristics.................................................................57
3.6 Input clocks............................................................................... 61
3.7 RESET initialization..................................................................67
3.8 DDR4 and DDR3L SDRAM controller.................................... 68
3.9 eSPI interface.............................................................................75
3.10 DUART interface...................................................................... 78
3.11 Ethernet interface, Ethernet management interface, IEEE Std
1588........................................................................................... 80
3.12 QUICC Engine Specifications...................................................99
3.13 USB interface............................................................................ 104
3.14 Integrated flash controller..........................................................105
3.15 Enhanced secure digital host controller (eSDHC).....................113
3.16 Multicore programmable interrupt controller (MPIC).............. 122
3.17 JTAG controller.........................................................................124
QorIQ T1042, T1022 Data Sheet, Rev. 2, 06/2015
2
Freescale Semiconductor, Inc.
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