Contents
STM8S103K3 STM8S103F3 STM8S103F2
Contents
1 Introduction ..............................................................................................................8
2 Description ...............................................................................................................9
3 Block diagram ........................................................................................................10
4 Product overview ...................................................................................................11
4.1 Central processing unit STM8 .....................................................................................11
4.2 Single wire interface module (SWIM) and debug module (DM) ..................................11
4.3 Interrupt controller .......................................................................................................12
4.4 Flash program and data EEPROM memory ................................................................12
4.5 Clock controller ............................................................................................................13
4.6 Power management ....................................................................................................14
4.7 Watchdog timers ..........................................................................................................14
4.8 Auto wakeup counter ...................................................................................................15
4.9 Beeper ........................................................................................................................15
4.10 TIM1 - 16-bit advanced control timer .........................................................................15
4.11 TIM2 - 16-bit general purpose timer ..........................................................................16
4.12 TIM4 - 8-bit basic timer ..............................................................................................16
4.13 Analog-to-digital converter (ADC1) ............................................................................16
4.14 Communication interfaces .........................................................................................17
4.14.1 UART1 ...............................................................................................17
4.14.2 SPI .....................................................................................................18
4.14.3 I²C ......................................................................................................18
5 Pinout and pin description ...................................................................................19
5.1 STM8S103Kx UFQFPN32/LQFP32 pinout and pin description ..................................19
5.2 STM8S103Fx TSSOP20/SO20/UFQFPN20 pinout and pin description .....................22
5.2.1 STM8S103Fx TSSOP20/SO20 pinout .................................................22
5.2.2 STM8S103Fx UFQFPN20 pinout ........................................................23
5.2.3 STM8S103Fx TSSOP20/SO20/UFQFPN20 pin description ................24
5.3 Alternate function remapping .......................................................................................25
6 Memory and register map .....................................................................................26
6.1 Memory map ................................................................................................................26
6.2 Register map ...............................................................................................................27
6.2.1 I/O port hardware register map ............................................................27
6.2.2 General hardware register map ..........................................................28
6.2.3 CPU/SWIM/debug module/interrupt controller registers .....................38
7 Interrupt vector mapping ......................................................................................40
8 Option bytes ...........................................................................................................42
8.1 Alternate function remapping bits ................................................................................44
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DocID15441 Rev 6