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SPT9110SIS PDF预览

SPT9110SIS

更新时间: 2024-02-25 18:23:19
品牌 Logo 应用领域
CADEKA 放大器光电二极管
页数 文件大小 规格书
11页 212K
描述
100 MSPS SINGLE-TO-DIFFERENTIAL TRACK-AND-HOLD

SPT9110SIS 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.33.00.01风险等级:5.78
标称采集时间:0.004 µs放大器类型:SAMPLE AND HOLD CIRCUIT
最大模拟输入电压:3.5 V最小模拟输入电压:1.5 V
JESD-30 代码:R-PDSO-G28长度:17.9 mm
功能数量:1端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
认证状态:Not Qualified采样并保持/跟踪并保持:TRACK
座面最大高度:2.84 mm供电电压上限:6 V
标称供电电压 (Vsup):5 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

SPT9110SIS 数据手册

 浏览型号SPT9110SIS的Datasheet PDF文件第2页浏览型号SPT9110SIS的Datasheet PDF文件第3页浏览型号SPT9110SIS的Datasheet PDF文件第4页浏览型号SPT9110SIS的Datasheet PDF文件第6页浏览型号SPT9110SIS的Datasheet PDF文件第7页浏览型号SPT9110SIS的Datasheet PDF文件第8页 
TRACK-TO-HOLD SETTLING TIME  
TIMING SPECIFICATION DEFINITIONS  
The time required for the output to settle to within 4 mV of its  
final value.  
ACQUISITION TIME  
This is the time it takes the SPT9110 to acquire the analog  
signalattheinternalholdcapacitorwhenitmakesatransition  
from hold mode to track mode. (See figure 1.) The acquisition  
time is measured from the 50% input clock transition point to  
thepointwhenthesignaliswithinaspecifiederrorbandatthe  
internal hold capacitor (ahead of the output amplifier). It does  
not include the delay and settling time of the output amplifier.  
Because the signal is internally acquired and settled at the  
hold capacitor before the output voltage has settled, the  
sampler can be put in hold mode before the output has settled.  
APERTURE DELAY  
The aperture delay time is the interval between the leading  
edge transition of the clock input and the instant when the  
input signal was equal to the held value. It is the difference  
in time between the digital hold switch delay and the analog  
signal propagation time.  
Figure 1 - Timing Diagram  
Aperture  
Delay  
Input  
Acquisition  
Time  
Observed at  
Hold Capacitor  
Output  
Observed at  
Amplifier Output  
Track-to-Hold  
Settling  
CLK  
Hold  
Track  
Hold  
NCLK  
SPT9110  
5
11/12/98  

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