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SNJ54AHCT595W PDF预览

SNJ54AHCT595W

更新时间: 2024-01-30 14:12:04
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器输出元件
页数 文件大小 规格书
16页 415K
描述
8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

SNJ54AHCT595W 数据手册

 浏览型号SNJ54AHCT595W的Datasheet PDF文件第2页浏览型号SNJ54AHCT595W的Datasheet PDF文件第3页浏览型号SNJ54AHCT595W的Datasheet PDF文件第4页浏览型号SNJ54AHCT595W的Datasheet PDF文件第5页浏览型号SNJ54AHCT595W的Datasheet PDF文件第6页浏览型号SNJ54AHCT595W的Datasheet PDF文件第7页 
ꢋ ꢌꢍꢎ ꢇ ꢀꢅꢎ ꢏ ꢇ ꢐꢑ ꢒ ꢎꢀ ꢇꢑ ꢐ  
SCLS374L − MAY 1997 − REVISED FEBRUARY 2004  
SN54AHCT595 . . . J OR W PACKAGE  
SN74AHCT595 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
Inputs Are TTL-Voltage Compatible  
8-Bit Serial-In, Parallel-Out Shift  
Shift Register Has Direct Clear  
Q
Q
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
B
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Q
C
D
A
Q
SER  
OE  
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Q
E
Q
12 RCLK  
F
11  
10  
9
Q
SRCLK  
SRCLR  
G
− 1000-V Charged-Device Model (C101)  
Q
H
GND  
Q
H′  
description/ordering information  
The ’AHCT595 devices contain an 8-bit serial-in,  
parallel-out shift register that feeds an 8-bit D-type  
storage register. The storage register has parallel  
3-state outputs. Separate clocks are provided for  
the shift and storage registers. The shift register  
has a direct overriding clear (SRCLR) input, serial  
(SER) input, and serial outputs for cascading.  
When the output-enable (OE) input is high, the  
outputs are in the high-impedance state.  
SN54AHCT595 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1 20 19  
18  
SER  
OE  
Q
4
5
6
7
8
D
Q
17  
16  
E
NC  
NC  
15 RCLK  
14  
9 10 11 12 13  
Q
F
Both the shift register clock (SRCLK) and storage  
register clock (RCLK) are positive-edge triggered.  
If both clocks are connected together, the shift  
register always is one clock pulse ahead of the  
storage register.  
SRCLK  
Q
G
NC − No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube  
SN74AHCT595N  
SN74AHCT595N  
Tube  
SN74AHCT595D  
AHCT595  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74AHCT595DR  
SN74AHCT595NSR  
SN74AHCT595DBR  
SN74AHCT595PW  
SN74AHCT595PWR  
SNJ54AHCT595J  
SNJ54AHCT595W  
SNJ54AHCT595FK  
SOP − NS  
AHCT595  
HB595  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
HB595  
Tape and reel  
Tube  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54AHCT595J  
SNJ54AHCT595W  
SNJ54AHCT595FK  
Tube  
−55°C to 125°C  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2004, Texas Instruments Incorporated  
ꢖ ꢁ ꢘꢑꢀꢀ ꢕ ꢇꢅ ꢑꢐꢓ ꢎꢀ ꢑ ꢁ ꢕꢇꢑꢙ ꢚꢛ ꢜꢝ ꢞꢟꢠ ꢡꢢꢣ ꢤꢚ ꢠꢟ ꢤꢚꢥ ꢜꢤꢝ ꢗꢐ ꢕ ꢙ ꢖ ꢆꢇ ꢎꢕ ꢁ  
ꢥꢝ  
ꢣꢤ  
ꢝꢚ  
ꢨꢥ ꢧ ꢥ ꢢ ꢣ ꢚ ꢣ ꢧ ꢝ ꢫ  
ꢣꢝ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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