Datasheet > SNC26016

SNC26016

更新时间： 2022-09-26 17:25:02

品牌	Logo	应用领域
松翰 - SONIX		控制器
页数	文件大小	规格书
11页	145K
描述
One Channel Speech Controller

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SNC26016 数据手册

SNC26016

One Channel Speech Controller

5.3 RAM

SNC26016 contains (64+16) nibble RAM <(64+16) x 4-bits>. The 64 nibble RAM is

only one page. Another 16 nibbles are 16 PWMIO duty registers. In our programming

structure, user can Directly use memory related command, M0 ~ M63 in the data

transfer type instructions, to access first 64 nibbles. Another 16 nibbles, user can use

PWMxL, PWMxH related command to access when PWMIO function is disabled.

(x can be 1~8)

5.4 Power Down Mode

“End” instruction makes the IC entering into Stop Mode will stop the system clock for

power savings (<3uA @VDD=3V and <6uA @VDD=4.5V.) Any valid data transition

(LꢁH or HꢁL) occurring on any IO pin can be used to start the system clock and

return to normal operating mode.

5.5 Sampling Rate Counter

The unique sampling rate counter is designed in voice channel to be able to play

diverse voices at different sample playing rates. The playing rate can be adaptively set

up among from the wide ranges of 2.5KHz to 20KHz. This architecture yields a

high-quality voice synthesis that sounds very close to its original source when played

through the same amplifier and speaker circuitry.

5.6 I/O Ports

There are two 4-bit I/O ports P2 and P3. Any I/O can be individually programmed as

either input pull low or output. Any valid data transition (Hꢁ L or LꢁH) of P2 and P3

can reactivate the chip when it is in power-down stage.

Port Data

PAD

Port Status

Weak

To Internal Data Bus

Read Control

I/O Port Configuration

Note:

(1) Weak N-MOS can serve as pull-low resistor.

(2) The driving/sink current of P2 & P3 is up to 8mA/16mA

Ver: 1.7

October 14, 2009

1...3 4 567 8 9...11

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