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SLA3125 PDF预览

SLA3125

更新时间: 2024-01-02 21:23:24
品牌 Logo 应用领域
精工 - SEIKO /
页数 文件大小 规格书
14页 168K
描述
Logic Circuit

SLA3125 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.84
Base Number Matches:1

SLA3125 数据手册

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PF757-02  
SLA30000 Series  
High Speed Gate Array  
Super high-speed, and high density gate array  
Dual power supply operation  
Raw gates from 18K to 216K gates  
(Sea of gates)  
DESCRIPTION  
The SLA30000 Series is an SOG-type CMOS gate array featuring the very high-speed operations, high density,  
and high output drive capability. This series has a full lineup of gate arrays to cover 18,544 to 216,216 gates for  
the large-scale, and high-speed systems. They can drive with both +5V and +3V supply voltages.  
This series also has a built-in level shifter to provide dual-power interfacing in various low-voltage applications. The  
I/O cells supporting the PCI Revision 2.0 are available for PCs and peripheral equipments. Also, the micro-ampere  
order, low-noise output cells are available for portable equipments and instruments of various applications.  
FEATURES  
Super-high density (adopting 0.6µm silicon gate CMOS with 2 and 3-metal layers)  
High-speed operation (operation delay of internal gate = 0.25ns at 5.0V, 2-input power NAND standard)  
Selectable supply voltage: 5.0V, 3.3V, 3.0V and built-in dual-power supplies level shift circuit  
Output drivability (IOL = 100µ, 1, 4, 8, 12 mA when PCI = 5.0V, IOL = 50µ, 500µ, 4, 6, 12 mA when PCI = 3.3V)  
On-chip RAM available  
I/O cells supporting the PCI Revision 2.0 and low noise output cells available  
PRODUCT LINEUP  
Master 2-layer Metal  
3-layer Metal  
SLA3018 SLA3030 SLA3042 SLA3055 SLA3075 SLA3109 SLA3125 SLA3216  
SLA301T SLA303T SLA304T SLA305T SLA307T SLA310T SLA312T SLA321T  
Features  
Total BCs  
(Raw Gates)  
Dual Power Supply  
18,544  
23,572  
9,272  
30,846  
37,232  
15,423  
26,219  
18,616  
31,647  
160  
42,262  
49,680  
19,863  
35,077  
23,349  
41,234  
184  
55,341  
63,784  
26,010  
44,272  
29,978  
51,027  
208  
75,450  
85,251  
33,952  
58,851  
38,362  
66,495  
240  
109,080  
120,802  
49,086  
81,810  
54,360  
90,601  
256  
125,836  
138,400  
54,109  
94,377  
59,512  
103,800  
304  
216,216  
232,582  
86,486  
151,351  
93,032  
162,807  
376  
Single Power Supply  
Usable BCs 2-layer Metal 2-layer Metal  
(Dual Power Supply) 3-layer Metal  
Usable BCs 2-layer Metal 2-layer Meta  
(Single Power Supply) 3-layer Metal  
Number of PADs  
16,318  
11,786  
20,743  
128  
Internal Gates  
tpd = 0.25ns (standard at 5.0V), tpd = 0.33ns (standard at 3.3V)  
tpd = 0.48ns (standard at 5.0V), tpd = 0.63ns (standard at 3.3V)  
tpd = 2.08ns (standard at 5.0V), tpd = 2.86ns (standard at 3.3V) CL = 50pF  
CMOS, TTL, PCI  
Propagation  
Input Buffers  
Delay  
Output Buffers  
I/O Level  
Input Mode  
Output Mode  
TTL, CMOS, Pull-up/Pull-down, schmitt, 3.0/3.3/5.0V Level interface (Level shifter)  
Normal, open drain, 3-state, Bi-directional, 3.0/3.3/5.0V Level interface (Level shifter)  
1

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