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SKY13477-001A PDF预览

SKY13477-001A

更新时间： 2024-01-30 11:05:57
品牌 Logo 应用领域
思佳讯 - SKYWORKS 电信电信集成电路
页数 文件大小 规格书
9页 412K
描述
Telecom Circuit, 1-Func, PBGA15, 1.942 X 1.942 MM, 0.420 MM HEIGHT, 0.40 MM PITCH, GREEN, WLCSP-15

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SKY13477-001A 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：1.942 X 1.942 MM, 0.420 MM HEIGHT, 0.40 MM PITCH, GREEN, WLCSP-15Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.7
JESD-30 代码：R-PBGA-B15长度：1.942 mm
功能数量：1端子数量：15
最高工作温度：90 °C最低工作温度：-35 °C
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装形状：RECTANGULAR封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：0.42 mm
标称供电电压：2.65 V表面贴装：YES
电信集成电路类型：TELECOM CIRCUIT温度等级：OTHER
端子形式：BALL端子节距：0.4 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：1.142 mmBase Number Matches：1

SKY13477-001A 数据手册

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DATA SHEET  
SKY13477-001A: 3P4T Transmit/Receive LTE Switch in a  
WLCSP Package  
Applications  
Receive and Transmit WCDMA FDD and TDD Band 7 systems  
Mode switching for cellular, tablet, and embedded modules  
RF1  
Features  
RF2  
400 micron WLCSP suitable for direct board attachment  
Low insertion loss optimized for high TDD band applications and  
FDD Band 7 applications  
RF3  
No external DC blocking capacitors required  
GND1/GND2  
Four GPIO control lines with VDD voltage regulator:  
VCTL = 1.8 V  
VDD = 2.45 to 3.00 V  
Logic and Supply  
DGND  
Small, 15-bump WLCSP, 200 μm diameter, 400 μm pitch  
(1.942 x 1.142 x 0.420 mm maximum) package (MSL1, 260 °C  
per JEDEC J-STD-020)  
VDD  
VC1  
VC2  
VC3 VC4  
S3171a  
Figure 1. SKY13477-001A Block Diagram  
Skyworks Green™ products are compliant with  
all applicable legislation and are halogen-free.  
For additional information, refer to Skyworks  
Definition of Green™, document number  
SQ04-0074.  
Description  
The SKY13477-001A is a Three-Pole, Four-Throw (3P4T) switch.  
Switching is controlled by an integrated GPIO interface with four  
control pins. Depending on the logic voltage level applied to the  
control pins, the following switched outputs are possible:  
RF1 port can be connected to the RF6 or RF5 port.  
RF2 port can be connected to the RF7 port.  
A
B
C
RF3 port can be connected to the RF4, RF5, RF6, or RF7 port.  
RF6  
RF4  
RF1  
5
No external DC blocking capacitors are required as long as no DC  
voltage is applied on any RF path. The internal voltage regulator  
allows the VDD supply value to be within 2.45 V to 3.00 V. Logic  
control is 1.8 V nominal.  
RF5  
RF7  
VC3  
GND1  
GND2  
DGND  
RF2  
RF3  
VC4  
4
3
The SKY13477-001A is provided in a compact 15-bump,  
1.942 x 1.142 x 0.420 mm (maximum) Wafer Level Chip Scale  
Package (WLCSP) that meets requirements for board-level  
assembly. Bump and Under-Bump Metallization (UBM) diameters  
are 200 microns.  
2
1
VDD  
VC1  
VC2  
A functional block diagram is shown in Figure 1. The pin  
configuration and package are shown in Figure 2. Signal pin  
assignments and functional pin descriptions are provided in  
Table 1.  
S3173  
Figure 2. SKY13477-001A Pinout  
(Top View, Bumps Facing Down)  
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com  
203104A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • January 27, 2014  
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