Datasheet > SFSH3.58MCB

SFSH3.58MCB

更新时间： 2022-10-23 11:37:33

品牌	Logo	应用领域
YAMAR		通信
页数	文件大小	规格书
12页	133K
描述
for DC-LIN Asynchronous Communication Over Noisy Lines

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数据手册

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SFSH3.58MCB 数据手册

Proprietary and Confidential Information of YAMAR Electronics Ltd.

SIG40 SIGNALS

The SIG40 Signals are divided into three main functions:

•

Host input / output

Line interface

Sleep mechanism

Figure 3.1 describes the interconnections between SIG40 its host, the ceramic filters and the DC line.

Ceramic

Filter

DC-Line

HDI

HDO

HDC

UART

TxOn

DTxO

HOST

LIN Controller

SIG40

Line

Interface

Wake

MF0nF1

nSleep

INH

RxOn

DRxP

InterfHop

Ceramic

Filter II

Crystal

Figure 3.1 - Interfacing the SIG40

Device signals are defined in table 3.1.

Table 3.1 - Device signals

Host I/O

signals

HDO

Line Interface

signals

Data Output

MF0nF1

OscOut

OscIn

RxN

F0/F1 selected Output

Crystal Output

INH

Inhibit operation Output

Data Input

HDI

Crystal Input

nSleep

HDC

Sleep Input

Rx Analog - Input

Rx Analog + Input

Transmit data Output

Transmit On Output

Receive On Output

Data/Command Input

Reset Input

RxP

nReset

Wake

InterfHop

DTxO

TxOn

RxOn

Wakeup Input

Allow Interference hopping Input

Power signals

Vcc

Power

Gnd

Power

GndPLL

VccPLL

Ground for PLL

Vcc for PLL

3.1

Host interface

Three lines are dedicated for Host data input / output and for command.

3.1.1

HDI

Data input signal to the SIG40. Transfer data from host to SIG40. When not in use should be pulled Up.

3.1.2

HDO

Data output signal from SIG40. Transfers received data to host.

3.1.3

HDC

Data/Command mode. When Low, enables read and write to internal registers. When not in use should

be pulled Up.

@ 2007 Yamar Electronics Ltd.

DS-SIG40 R1.8

1 234 5 6 7...12

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