Datasheet > SE4120L

SE4120L

更新时间： 2024-01-18 05:27:15

品牌	Logo	应用领域
SIGE		/
页数	文件大小	规格书
2页	125K
描述
GNSS Receiver IC

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SE4120L 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	2.20 X 2.20 MM, 0.35 MM HEIGHT, ROHS COMPLIANT, CSP-46
针数：	46	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.84
JESD-30 代码：	R-PBGA-B46	长度：	2.204 mm
功能数量：	1	端子数量：	46
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	FBGA
封装形状：	RECTANGULAR	封装形式：	GRID ARRAY, FINE PITCH
峰值回流温度（摄氏度）：	NOT SPECIFIED	标称供电电压：	3.3 V
表面贴装：	YES	电信集成电路类型：	TELECOM CIRCUIT
温度等级：	INDUSTRIAL	端子形式：	BALL
端子节距：	0.25 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	2.18 mm
Base Number Matches：	1

SE4120L 数据手册

SE4120L

GNSS Receiver IC

Applications

Product Description

The SE4120L is a highly-integrated GNSS radio front

end IC offering high performance and low power

operation in a wide range of low-cost applications. It

supports GPS and dual-mode L1-band GPS/Galileo

Dual-mode GPS and Galileo receivers

Software-defined GNSS radio systems

High sensitivity / low power GNSS / A-GNSS apps.

Portable navigation devices, mobile phones, and

GNSS peripheral devices

products.

The SE4120L features a conditioned

interface for software implementations of GNSS

baseband signal processing.

Telematics equipment

Features

The SE4120L includes an on-chip LNA, a low IF

receiver with a linear AGC and an advanced multi-bit

I/Q analog to digital converter (ADC) with serialized

data output. The receiver incorporates a fully integrated

image reject mixer, obviating the need for a SAW filter

in many applications. The SE4120L’s on-chip IF filter

may be adjusted from 2.2 MHz BW (for GPS only) to

4.4MHz BW (for simultaneous reception of Galileo and

GPS signals). The digitized I/Q output, centered near-

zero IF, is available in a serialized data stream to

facilitate software signal processing.

Single conversion L1-band GPS/Galileo radio with

integrated IF filter

2-bit serialized digital I/Q output at near-zero IF

Integrated LNA with high-gain (18.5 dB typ.) and

low NF (1.7 dB typ.)

Low 2.2 dB typ. RF system noise figure

Low 10 mA operating current with 2.7-3.6 V supply;

8 mA with internal LNA disabled

Low Standby current 3 μA typical

Fully integrated VCO and resonator

The highly-integrated PLL synthesizer of the SE4120L

requires only two passive components to implement an

off-chip loop filter.

Integrated PLL supporting 16.368 MHz reference

frequency

I/O supply range extends down to 1.7 V

The SE4120L is optimized for the lowest possible

power consumption consistent with a very low external

component count.

4 x 4 mm 24 pin QFN, RoHS-compliant package

Ordering Information

The SE4120L incorporates current-controlled low-

spurious output buffers which may be run from a

separate external supply to interface to low voltage

systems. Output buffers supply sufficient current to

drive most baseband devices directly.

Part No.

Package

Remark

SE4120L-R 24 Pin QFN

Shipped in Tape & Reel

Functional Block Diagram

Optional

filter

MIX_IN

LNA_OUT

VAGC

AGC_DIS

AGC

Controller

IF Filter

-45°

DATA_OUT

SYNC

ADC

Buffer

Data

Downconverter /

Serializer

LNA

+45°

FILT_BW

CLK_OUT

Sample

Clock

LNA_IN

divider

Quadrature

÷2

FILT_BW

Fs_SEL1

Fs_SEL0

Feedback

Divider

VCO

Chip

Control

SE4120

RX_EN

Phase/Frequency

Detector

Reference

Divider

OSC_EN

Reference

Oscillator

/ Buffer

RVI

VTUNE

PLL Loop

Filter

XTAL1/

TCXO IN

XTAL2

DST-00059 Rev 3.5 May-26-2009

1 of 2

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