256 Mb (32 MB) / 512 Mb (64MB) FL-S Flash
SPI Dual-Quad, 3.0 V
Table of contents
Table of contents
Features ...........................................................................................................................................1
Performance summary ......................................................................................................................3
Table of contents...............................................................................................................................4
1 Overview .......................................................................................................................................6
1.1 General description ................................................................................................................................................6
2 SPI with multiple input / output (SPI-MIO) dual-quad.........................................................................7
3 Signal descriptions .........................................................................................................................8
3.1 Input/output summary...........................................................................................................................................8
3.2 Multiple input / output (dual-quad SPI) ................................................................................................................8
3.3 RESET#.....................................................................................................................................................................9
3.4 Multiple Input / Output (Dual-Quad)......................................................................................................................9
3.5 Serial Clock (SCK)....................................................................................................................................................9
3.6 Chip Select (CS#).....................................................................................................................................................9
3.7 Input Output IO0–IO7 .............................................................................................................................................9
3.8 Core Voltage Supply (VCC).......................................................................................................................................9
3.9 Versatile I/O Power Supply (VIO)...........................................................................................................................10
3.10 Supply and Signal Ground (VSS) .........................................................................................................................10
3.11 Not Connected (NC) ............................................................................................................................................10
3.12 Reserved for Future Use (RFU) ...........................................................................................................................10
3.13 Do Not Use (DNU)................................................................................................................................................10
3.14 Block diagram .....................................................................................................................................................11
4 Signal protocols............................................................................................................................12
4.1 SPI clock modes ....................................................................................................................................................12
4.2 Command protocol...............................................................................................................................................13
4.3 Interface states .....................................................................................................................................................18
4.4 Configuration Register effects on the Interface ..................................................................................................21
4.5 Data protection.....................................................................................................................................................22
5 Electrical specifications.................................................................................................................23
5.1 Absolute maximum ratings ..................................................................................................................................23
5.2 Thermal resistance ...............................................................................................................................................23
5.3 Operating ranges ..................................................................................................................................................24
5.4 Power-up and power-down..................................................................................................................................25
5.5 DC characteristics .................................................................................................................................................27
6 Timing specifications ....................................................................................................................28
6.1 Key to switching waveforms.................................................................................................................................28
6.2 AC test conditions .................................................................................................................................................29
6.3 Reset ......................................................................................................................................................................30
6.4 SDR AC characteristics..........................................................................................................................................32
6.5 DDR AC characteristics .........................................................................................................................................34
7 Physical interface .........................................................................................................................37
7.1 Dual-Quad SOIC 16-lead package ........................................................................................................................37
7.2 SOIC 16 physical diagram.....................................................................................................................................38
8 Address space maps ......................................................................................................................39
8.1 Overview................................................................................................................................................................39
8.2 Flash memory array ..............................................................................................................................................40
8.3 ID-CFI address space.............................................................................................................................................41
8.4 OTP address space................................................................................................................................................41
8.5 Registers................................................................................................................................................................44
9 Data protection ............................................................................................................................56
9.1 Secure silicon region (OTP) ..................................................................................................................................56
9.2 Write Enable command ........................................................................................................................................57
Datasheet
4 of 134
002-00518 Rev. *F
2022-05-27
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