RTL8201DL
Datasheet
List of Tables
Table 1. MII Interface..................................................................................................................................5
Table 2. RMII Interface ...............................................................................................................................6
Table 3. SNI (Serial Network Interface) 10Mbps Only ..............................................................................6
Table 4. Clock Interface ..............................................................................................................................7
Table 5. 10Mbps/100Mbps Network Interface............................................................................................7
Table 6. Device Configuration Interface .....................................................................................................7
Table 7. LED Interface/PHY Address Configuration..................................................................................8
Table 8. Power and Ground Pins.................................................................................................................8
Table 9. Reset and Other Pins......................................................................................................................8
Table 10. Register 0 Basic Mode Control Register .......................................................................................9
Table 11. Register 1 Basic Mode Status Register........................................................................................10
Table 12. Register 2 PHY Identifier Register 1...........................................................................................11
Table 13. Register 3 PHY Identifier Register 2...........................................................................................11
Table 14. Register 4 Auto-Negotiation Advertisement Register (ANAR)..................................................11
Table 15. Register 5 Auto-Negotiation Link Partner Ability Register (ANLPAR) ....................................12
Table 16. Register 6 Auto-Negotiation Expansion Register (ANER).........................................................13
Table 17. Register 16 NWay Setup Register (NSR)....................................................................................13
Table 18. Register 17 Loopback, Bypass, Receiver Error Mask Register (LBREMR) ..............................13
Table 19. Register 18 RX_ER Counter (REC)............................................................................................14
Table 20. Register 19 SNR Display Register ..............................................................................................14
Table 21. Register 25 Test Register.............................................................................................................14
Table 22. Serial Management......................................................................................................................17
Table 23. Setting the Medium Type and Interface Mode to MAC..............................................................18
Table 24. UTP Mode and MII Interface ......................................................................................................18
Table 25. UTP Mode and SNI Interface......................................................................................................19
Table 26. Fiber Mode and MII Interface .....................................................................................................19
Table 27. Auto-Negotiation Mode Pin Settings ..........................................................................................19
Table 28. Power Saving Mode Pin Settings ................................................................................................20
Table 29. Absolute Maximum Ratings........................................................................................................24
Table 30. Operating Conditions...................................................................................................................24
Table 31. Power Dissipation........................................................................................................................24
Table 32. Input Voltage: Vcc.......................................................................................................................25
Table 33. MII Transmission Cycle Timing .................................................................................................25
Table 34. MII Reception Cycle Timing.......................................................................................................27
Table 35. RMII Transmission Cycle Timing...............................................................................................28
Table 36. RMII Reception Cycle Timing....................................................................................................28
Table 37. SNI Transmission Cycle Timing .................................................................................................29
Table 38. SNI Reception Cycle Timing ......................................................................................................30
Table 39. MDC/MDIO Timing....................................................................................................................31
Table 40. Crystal Characteristics.................................................................................................................32
Table 41. Transformer Characteristics ........................................................................................................32
Table 42. Ordering Information...................................................................................................................35
Single-Chip/Port 10/100 Fast Ethernet PHYceiver with Auto MDIX
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Track ID: JATR-1076-21 Rev. 1.0
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