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RT8239BZQW PDF预览

RT8239BZQW

更新时间: 2022-05-14 22:20:20
品牌 Logo 应用领域
立锜 - RICHTEK /
页数 文件大小 规格书
24页 385K
描述
High Efficiency, Main Power Supply Controller for Notebook Computers

RT8239BZQW 数据手册

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RT8239A/B/C  
Functional Pin Description  
Pin No.  
Pin Name  
Pin Function  
SMPS1 Feedback Input. Connect FB1 to a resistive voltage divider from SMPS1  
output to GND for adjustable output from 2V to 5.5V.  
1
FB1  
Channel 1 Enable and Current Limit Setting Input. Connect resistor to GND to set  
the threshold for Channel 1 synchronous R  
sense. The GND-PHASE1  
DS(ON)  
2
3
4
ENTRIP1  
TON  
current limit threshold is 1/10th the voltage seen at ENTRIP1 over a 0.5V to 3V  
range. There is an internal 10μA current source from LDO5 to ENTRIP1. Leave  
ENTRIP1 floating or drive it above 4.5V to shut down channel 1.  
ON-Time/Frequency Adjustment Input. Connect to GND with 56kΩ to 100kΩ.  
Channel 2 Enable and Current Limit Setting Input. Connect resistor to GND to set  
the threshold for Channel 2 synchronous R  
sense. The GND-PHASE2  
DS(ON)  
ENTRIP2  
current limit threshold is 1/10th the voltage seen at ENTRIP2 over a 0.5V to 3V  
range. There is an internal 10μA current source from LDO5 to ENTRIP2. Leave  
ENTRIP2 floating or drive it above 4.5V to shut down channel 2.  
SMPS2 Feedback Input. Connect FB2 to a resistive voltage divider from SMPS2  
output to GND for adjustable output from 2V to 5.5V.  
5
6
FB2  
Power Good Output for Channel 1 and Channel 2 (RT8239A).  
PGOOD  
Power Good Output for Channel 1, Channel 2 and SECFB (RT8239B/C).  
Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor  
according to the typical application circuits.  
7
8
9
BOOT2  
Upper Gate Driver Output for SMPS2. UGATE2 swings between PHASE2 and  
BOOT2.  
UGATE2  
PHASE2  
Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the UGATE2  
high side gate driver. PHASE2 is also the current sense input for the SMPS2.  
10  
11  
LGATE2  
VIN  
Lower Gate Drive Output for SMSP2. LGATE2 swings between GND and LDO5.  
Supply Input for LDO5.  
Master Enable Input. LDO5/LDO3 is enabled if it is within logic high level and  
disabled if it is less than the logic low level. Leave ENLDO floating to default  
enable LDO5/LDO3.  
12  
13  
ENLDO  
ENM  
(RT8239A)  
Mode Selection with Enable Input. Pull up to LDO5 (Ultrasonic mode) or LDO3  
(DEM) to turn on both switch Channels. Short to GND for shutdown.  
Change Pump Feedback Pin. The SECFB is used to monitor the optional external  
charge pump. Connect a resistive divider from the change pump output to GND to  
detect the output. If SECFB drops below its feedback threshold, an ultrasonic  
pulse occurs to refresh the charge pump driven by LGATE1 or LGATE2.  
If SECFB drops below its UV threshold, the switcher channels stop working and  
enter into discharge-mode. Pull up to LDO5 or LDO3 to disable SECFB UVP  
function.  
SECFB  
(RT8239B/C)  
5V Linear Regulator Output. LDO5 is the supply voltage for the low side MOSFET  
driver and also the analog supply voltage for the device. Bypass a minimum 4.7μF  
ceramic capacitor to GND  
14  
LDO5  
3.3V Linear Regulator Output. Bypass a minimum 4.7μF ceramic capacitor to  
GND.  
15  
16  
17  
LDO3  
LGATE1  
PHASE1  
Lower Gate Driver Output for SMPS1. LGATE1 swings between GND and LDO5.  
Switch Node SMPS1. PHASE1 is the internal lower supply rail for the UGATE1  
high side gate driver. PHASE1 is also the current sense input for the SMPS1.  
Copyright 2012 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
DS8239A/B/C-06 October 2012  
www.richtek.com  
5

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