Datasheet
R01DS0432EJ0110
Rev.1.10
RL78/G24
RENESAS MCU
Nov 1, 2023
High-performance with 48-MHz CPU operation on true low-power platform, 50-µA/MHz operating current, flexible
application accelerator (FAA), enhanced timers and analog functions for motor control, digital power supply, and lighting
applications, providing PMBus/SMBus, and DALI-2 communications, from 20 to 64 pins, 1.6- to 5.5-V operation
1. Outline
1.1
Features
• A 32-byte shared memory is included for sharing
of data by the RL78 CPU and FAA core.
Ultra-low power consumption technology
• VDD = single power supply voltage of 1.6 to 5.5 V
• HALT mode
Divider
• STOP mode
• 32-bit ÷ 32-bit = 32-bit unsigned
• High-speed wakeup from the STOP mode is
possible.
Code flash memory
• SNOOZE mode
• 64 or 128 Kbytes
• Block size: 2 Kbytes
RL78 CPU core
• Security function: Prohibition of block erase and
rewriting
• CISC architecture with 3-stage pipeline
• The minimum instruction execution time can be
changed from high to ultra-low speed.
– High speed: 0.02083 µs at 48 MHz operation
with the high-speed on-chip oscillator clock or
the PLL clock
• On-chip debugging
• Self-programming with boot swapping and flash
shield window
Data flash memory
– Ultra-low speed: 30.5 µs at 32.768 kHz
operation with the subsystem clock
• Multiply/divide/multiply & accumulate instructions
are supported.
• 4 Kbytes
• Background operation (BGO): Instructions can be
executed from the program memory while
rewriting the data flash memory.
• Number of rewrites: 1,000,000 times (typ.)
• Address space: 1 Mbyte
• General-purpose registers: (8-bit register × 8) × 4
banks
High-speed on-chip oscillator
• Selectable from among 64 MHz, 48 MHz, 32 MHz,
24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz,
3 MHz, 2 MHz, and 1 MHz
• On-chip RAM: 12 Kbytes
FAA core
• Multiplication: 32-bit signed × 32-bit signed →
32-bit signed
• High accuracy:
±1.0% (VDD = 1.8 to 5.5 V, TA = –20 to
+85°C)
• Results of 64-bit multiplication can be right-shifted
by a desired number of bits.
• Addition: 32-bit signed + 32-bit signed → 32-bit
signed (internally calculated with 33-bit precision)
• Subtraction: 32-bit signed - 32-bit signed → 32-bit
signed (internally calculated with 33-bit precision)
• Limit operation: Operation parameter registers (33
bits × 4) in which upper and lower limits can be
set.
Middle-speed on-chip oscillator
• Selectable from among 4 MHz, 2 MHz, and 1 MHz
with adjustability
Low-speed on-chip oscillator
• 32.768 kHz (typ.) with adjustability
• Operation parameter registers (32 bits × 6)
• Address pointer registers (12 bits × 6)
• On-chip code RAM: 4 Kbytes
Operating ambient temperature
• TA = –40 to +85°C (2D: Consumer applications)
• TA = –40 to +105°C (3C: Industrial applications)
• TA = –40 to +125°C (4C: Industrial applications)
• On-chip data RAM: 2 Kbytes
• Multiple interrupts available
R01DS0432EJ0110 Rev.1.10
Nov 1, 2023
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