Datasheet
R01DS0416EJ0110
Rev.1.10
RA8D1 Group
Renesas Microcontrollers
Dec 5, 2023
High-performance 480 MHz Arm® Cortex®-M85 core with HeliumTM, up to 2 MB code flash memory with Dual-bank,
background and SWAP operation, 12 KB Data flash memory, and 1 MB SRAM with Parity/ECC. High-integration with
Ethernet MAC controller, USB 2.0 High-Speed, CANFD, SDHI, I3C, Octal SPI, Decryption on-the-fly, Graphics LCD
Controller, 2D Drawing Engine, MIPI DSI and advanced analog. Integrated Renesas Secure IP with cryptography
accelerators, key management support, tamper detection and power analysis resistance in concert with Arm® TrustZone for
integrated secure element functionality.
Features
®
®
TM
● Pin function
■
Arm Cortex -M85 core with Helium
– Up to three tamper-resistant pins
– Secure pin multiplexing
● Armv8.1-M architecture profile
● Armv8-M Security Extension
● Maximum operating frequency: 480 MHz
● Memory Protection Unit (Arm MPU)
– Protected Memory System Architecture (PMSAv8)
– Secure MPU (MPU_S): 8 regions
– Non-secure MPU (MPU_NS): 8 regions
● SysTick timer
– Embeds two Systick timers: Secure and Non-secure instance
– Driven by CPUCLK or MOCO divided by 8
● CoreSight ETM-M85
■ System and Power Management
● Low power modes
● Battery backup function (VBATT)
● Realtime Clock (RTC) with calendar and VBATT support
● Event Link Controller (ELC)
● Data Transfer Controller (DTC)
● DMA Controller (DMAC) × 8
● Power-on reset
● Programable Voltage Detection (PVD) with voltage settings
● Watchdog Timer (WDT)
● Independent Watchdog Timer (IWDT)
™
■ Memory
● Up to 2 MB code flash memory
● 12 KB data flash memory (100,000 program/erase (P/E) cycles)
● 1 MB SRAM including 128 KB of TCM
■ Human Machine Interface (HMI)
● Graphics LCD Controller (GLCDC)
● 2D Drawing Engine (DRW)
● Capture Engine Unit (CEU)
● MIPI DSI
■ Connectivity
● Serial Communications Interface (SCI) × 6 , up to 60 Mbps
– Asynchronous interfaces
– 8 bit clock synchronous interface
– Smart card interface
– Simple IIC
– Simple SPI
– Manchester coding (SCI0)
– Simple LIN (SCI0, SCI1)
● I C bus interface (IIC) × 2
● I C bus interface (I3C)
● Serial Peripheral Interface (SPI) × 2, up to 60 Mbps
● Octal Serial Peripheral Interface (OSPI)
● USB 2.0 Full-Speed Module (USBFS)
■ Multiple Clock Sources
● Main clock oscillator (MOSC) (8 to 48 MHz)
● Sub-clock oscillator (SOSC) (32.768 kHz)
● High-speed on-chip oscillator (HOCO) (16/18/20/32/48 MHz)
● Middle-speed on-chip oscillator (MOCO) (8 MHz)
● Low-speed on-chip oscillator (LOCO) (32.768 kHz)
● Clock trim function for HOCO/MOCO/LOCO
● PLL1/PLL2
2
3
● Clock out support
■ General-Purpose I/O Ports
● USB 2.0 High-Speed Module (USBHS)
● CAN with Flexible Data-rate (CANFD) × 2
● Ethernet MAC/DMA Controller (ETHERC/EDMAC)
● SD/MMC Host Interface (SDHI) × 2
● 5-V tolerance, open drain, input pull-up, switchable driving ability
■ Operating Voltage
● VCC: 1.68 to 3.6 V
● VCC2: 1.65 to 3.6 V
● Serial Sound Interface Enhanced (SSIE) × 2
■ Analog
■ Operating Junction Temperature and Packages
● 12-bit A/D Converter (ADC12) × 2
● 12-bit D/A Converter (DAC12) × 2
● High-Speed Analog Comparator (ACMPHS) × 2
● Temperature Sensor (TSN)
● Tj = -40℃ to +125℃
– 176-pin LQFP (24 mm × 24 mm, 0.5 mm pitch)
– 224-pin BGA (13 mm × 13 mm, 0.8 mm pitch)
■ Timers
● General PWM Timer 32-bit (GPT32) × 8
● General PWM Timer 16-bit (GPT16) × 6
● Low Power Asynchronous General Purpose Timer (AGT) × 2
● Ultra-Low-Power Timer (ULPT) × 2
■ Security and Encryption
● Renesas Secure IP (RSIP-E51A)
– Symmetric cryptography: AES
– Asymmetric cryptography: RSA, ECC
– Message digest computation: HASH
– 128 bit unique ID
®
®
● Arm TrustZone
– Up to two or four regions for the code flash, depending on the
bank mode
– Up to two regions for the data flash
– Up to two regions for the SRAM
– Individual Secure or Non-secure security attribution for each
peripheral
● Privileged control
● Device lifecyle management
● Secure boot
● Decryption on-the-fly (DOTF)
R01DS0416EJ0110 Rev.1.10
Dec 5, 2023
Page 1 of 193
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