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PM8031 PDF预览

PM8031

更新时间: 2024-01-08 22:21:36
品牌 Logo 应用领域
美高森美 - MICROSEMI /
页数 文件大小 规格书
2页 198K
描述
Fiber Optic Device,

PM8031 技术参数

生命周期:TransferredReach Compliance Code:unknown
风险等级:5.72Base Number Matches:1

PM8031 数据手册

 浏览型号PM8031的Datasheet PDF文件第2页 
PM8031 Tachyon QE8e+  
Quad-Channel 8 Gbps Fibre Channel Controller  
with Encryption at Full Line Rate  
Preliminary Product Brief  
The QE8e+ provides bi-directional encryption/decryption capabil-  
ities at a full 8 Gbps line rate with 400K unique Data Encryption  
Keys per second on each port. The Flexible key management of  
the QE8e+ supports 1 million Data Encryption Keys (DEK) per port  
and 8 Key Encryption Keys (KEK) per port. Similar to DIF, DEKs  
may be defined on a per I/O (SEST) or a per L/A basis.  
Product Overview  
The PM8031 Tachyon QE8e+ device is an IEEE 1619 compliant,  
high-performance 4-port, 8 Gbps Fibre Channel controller. It  
features an 8-lane native PCI-Express Gen-II link, enabling full-  
duplex operation simultaneously on all ports. The Tachyon QE8e+  
is capable of performing 1.6 million IOPS, making it an ideal  
integrated single chip solution for a variety of high-performance  
I/O applications.  
The Tachyon QE8e+ is designed to be certifiable to the FIPS 140-2  
Level 3 standard. The Data encryption uses the XTS-AES  
algorithm, as defined by the IEEE 1619 standard, and the NIST  
approved AES Key Wrap algorithm is used to secure the data keys.  
The QE8e+ features combined 64 Gbps full duplex capabilities on  
its 4 FC ports. Up to 4 processors per FC link are supported,  
allowing systems to scale to required performance, as needed.  
Product Highlights  
4-port 8/4/2 Gbps Fibre Channel controller  
The 1.6M IOPS capability of the QE8e+ is compatible with the  
Tachyon programming model at the register level, and also with  
the Tachyon Software Development Kit (TSDK) API tools. It  
features Multi-DMA, advanced frame-handling functions, and T10  
DIF provides robust CRC-based data protection.  
Supports 10 Km distance per link at 8G link rate without  
external memory  
Native PCI-Express 2.0 8-lane Gen-II 5-Gbit Host Interface  
Multiple Outbound PCIe read requests  
Tachyon StorClad technology delivers unparalleled encryption  
performance for Fibre Channel storage products. It utilizes  
standards-based encryption algorithms and security practices  
assuring vendors of FIPS-certifiable solutions when implemented  
with StorClad enabled products.  
Full duplex operation for each port  
Fibre Channel auto-speed negotiation  
Virtualization support with H/W assisted FC Frame Steering  
Support for up to 4 processors per FC Link  
T10 Data Integrity Field protection (T10 DIF)  
Multi-DMA for cache mirroring  
SCSI BiDi command assist  
Enhanced TRE for higher performance on small data transfers  
Block Diagram  
CRC offload engine for enabling non-T10 DIF compliant  
solutions  
PCI Express 2.0 Gen-2x8 Interface  
2
8
1
ERQ/SCSI LL priority control for additional Quality of Service  
control  
TWI control and presence detect for optical transceivers  
PCI Express Core  
Platform-independent software development API tools  
including sample code for Linux, and Windows  
Tachyon Expressway  
Standard and RoHS compliant packages  
Industry-leading technical support and documentation  
Port 1  
Port 2  
Port 3  
Port 4  
Data Integrity Features  
Variable block size support: 512/520 bytes  
I/O level T10 DIF support  
T10 DIF  
T10 DIF  
T10 DIF  
T10 DIF  
XTS-AES  
XTS-AES  
XTS-AES  
XTS-AES  
CRC Offload Engine (COE)  
T10 DIF per L/A (DPL)  
Encryption Features  
8Gb FC  
8Gb FC  
8Gb FC  
8Gb FC  
IEEE 1619 Draft Standard Architecture for Encrypted Shared  
Storage Media, XTS-AES 256-bit data-at-rest encryption  
FIPS-140-2, Levels 1-3 certifiable  
NIST AES Key Wrap, 8 programmable Key Encryption Keys (KEK)  
1M Data Encryption Keys (DEK) per port  
400K encrypted IOPS/port  
PMC-2061613, Issue 4  
© Copyright PMC-Sierra, Inc. 2008  
All rights reserved. Proprietary and Confidential to PMC-Sierra, Inc. and for its customers’ internal use.  

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