PIC18(L)F1XK22
1.1.2
MULTIPLE OSCILLATOR OPTIONS
AND FEATURES
1.0
DEVICE OVERVIEW
This family offers the advantages of all PIC18
microcontrollers namely, high computational
performance with the addition of high-endurance,
Flash program memory. On top of these features, the
All of the devices in the PIC18(L)F1XK22 family offer
ten different oscillator options, allowing users a wide
range of choices in developing application hardware.
These include:
–
PIC18(L)F1XK22
family
introduces
design
enhancements that make these microcontrollers a
logical choice for many high-performance, power
sensitive applications.
• Four Crystal modes, using crystals or ceramic
resonators
• External Clock modes, offering the option of using
two pins (oscillator input and a divide-by-4 clock
output) or one pin (oscillator input, with the
second pin reassigned as general I/O)
1.1
New Core Features
1.1.1
XLP TECHNOLOGY
• External RC Oscillator modes with the same pin
options as the External Clock modes
All of the devices in the PIC18(L)F1XK22 family
incorporate a range of features that can significantly
reduce power consumption during operation. Key
items include:
• An internal oscillator block which contains a
16 MHz HFINTOSC oscillator and a 31 kHz
LFINTOSC oscillator which together provide eight
user selectable clock frequencies, from 31 kHz to
16 MHz. This option frees the two oscillator pins
for use as additional general purpose I/O.
• Multiple Idle Modes: The controller can also run
with its CPU core disabled but the peripherals still
active. In these states, power consumption can be
reduced even further, to as little as 4% of normal
operation requirements.
• A Phase Lock Loop (PLL) frequency multiplier,
available to both the high-speed crystal and
internal oscillator modes, which allows clock
speeds of up to 64 MHz. Used with the internal
oscillator, the PLL gives users a complete
selection of clock speeds, from 31 kHz to 64 MHz
– all without using an external crystal or clock
circuit.
• On-the-fly Mode Switching: The
power-managed modes are invoked by user code
during operation, allowing the user to incorporate
power-saving ideas into their application’s
software design.
• Low Consumption in Key Modules: The
power requirements for both Timer1 and the
Watchdog Timer are minimized. See
Section 26.0 “Electrical Specifications”
for values.
Besides its availability as a clock source, the internal
oscillator block provides a stable reference source that
gives the family additional features for robust
operation:
• Fail-Safe Clock Monitor: This option constantly
monitors the main clock source against a
reference signal provided by the LFINTOSC. If a
clock failure occurs, the controller is switched to
the internal oscillator block, allowing for continued
operation or a safe application shutdown.
• Two-Speed Start-up: This option allows the
internal oscillator to serve as the clock source
from Power-on Reset, or wake-up from Sleep
mode, until the primary clock source is available.
DS40001365F-page 6
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