Datasheet > PCA9555DB/G,118

PCA9555DB/G,118

更新时间： 2024-02-23 02:28:55

品牌	Logo	应用领域
恩智浦 - NXP		PC 光电二极管外围集成电路
页数	文件大小	规格书
34页	183K
描述
PCA9555 - 16-bit I2C-bus and SMBus I/O port with interrupt SSOP2 24-Pin

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PCA9555DB/G,118 技术参数

Source Url Status Check Date：	2013-06-14 00:00:00	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SSOP2
包装说明：	SSOP, SSOP24,.3	针数：	24
Reach Compliance Code：	unknown	风险等级：	5.28
JESD-30 代码：	R-PDSO-G24	长度：	8.2 mm
位数：	16	I/O 线路数量：	16
端口数量：	2	端子数量：	24
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装等效代码：	SSOP24,.3	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	电源：	2.5/5 V
认证状态：	Not Qualified	座面最大高度：	2 mm
子类别：	Parallel IO Port	最大供电电压：	5.5 V
最小供电电压：	2.3 V	标称供电电压：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
宽度：	5.3 mm	uPs/uCs/外围集成电路类型：	PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches：	1

PCA9555DB/G,118 数据手册

PCA9555

16-bit I²C-bus and SMBus I/O port with interrupt

Rev. 08 — 22 October 2009

Product data sheet

1. General description

The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallel

Input/Output (GPIO) expansion for I²C-bus/SMBus applications and was developed to

enhance the NXP Semiconductors family of I²C-bus I/O expanders. The improvements

include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O

conﬁguration, and smaller packaging. I/O expanders provide a simple solution when

additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.

The PCA9555 consists of two 8-bit Conﬁguration (Input or Output selection); Input, Output

and Polarity Inversion (active HIGH or active LOW operation) registers. The system

master can enable the I/Os as either inputs or outputs by writing to the I/O conﬁguration

bits. The data for each Input or Output is kept in the corresponding Input or Output

address compatible with the PCF8575, software changes are required due to the

enhancements, and are discussed in Application Note AN469.

The PCA9555 open-drain interrupt output is activated when any input state differs from its

corresponding input port register state and is used to indicate to the system master that

an input state has changed. The power-on reset sets the registers to their default values

and initializes the device state machine.

Three hardware pins (A0, A1, A2) vary the ﬁxed I²C-bus address and allow up to eight

devices to share the same I²C-bus/SMBus. The ﬁxed I²C-bus address of the PCA9555 is

the same as the PCA9554, allowing up to eight of these devices in any combination to

share the same I²C-bus/SMBus.

2. Features

I Operating power supply voltage range of 2.3 V to 5.5 V

I 5 V tolerant I/Os

I Polarity Inversion register

I Active LOW interrupt output

I Low standby current

I Noise ﬁlter on SCL/SDA inputs

I No glitch on power-up

I Internal power-on reset

I 16 I/O pins which default to 16 inputs

I 0 Hz to 400 kHz clock frequency

I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per

JESD22-A115, and 1000 V CDM per JESD22-C101

12 3 4 5 6 7...34

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与PCA9555DB/G,118相关器件

型号	品牌	获取价格	描述	数据表
PCA9555DBG4	TI	获取价格	REMOTE 16-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
PCA9555DBQ	TI	获取价格	暂无描述
PCA9555DBQR	TI	获取价格	REMOTE 16-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
PCA9555DBQRG4	TI	获取价格	REMOTE 16-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
PCA9555DBR	TI	获取价格	REMOTE 16-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
PCA9555DBRG4	TI	获取价格	REMOTE 16-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
PCA9555DBT	TI	获取价格	IC 16 I/O, PIA-GENERAL PURPOSE, PDSO24, PLASTIC, SSOP-24, Parallel IO Port
PCA9555DB-T	NXP	获取价格	IC 16 I/O, PIA-GENERAL PURPOSE, PDSO24, 5.30 MM, PLASTIC, MO-150, SOT340-1, SSOP-24, Paral
PCA9555DGVR	TI	获取价格	REMOTE 16-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
PCA9555DGVRG4	TI	获取价格	REMOTE 16-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

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