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PCA9535DWR PDF预览

PCA9535DWR

更新时间： 2024-02-28 16:59:35
品牌 Logo 应用领域
德州仪器 - TI 并行IO端口微控制器和处理器外围集成电路光电二极管输出元件PC时钟
页数 文件大小 规格书
35页 835K
描述
REMOTE 16-BIT I2C AND SMBus, LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

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PCA9535DWR 技术参数

生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN, LCC24/28,.14X.2,20针数：24
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.68
JESD-30 代码：R-PQCC-N24长度：5.5 mm
位数：16I/O 线路数量：16
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：HVQCCN
封装等效代码：LCC24/28,.14X.2,20封装形状：RECTANGULAR
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE电源：2.5/5 V
认证状态：Not Qualified座面最大高度：1 mm
子类别：Parallel IO Port最大供电电压：5.5 V
最小供电电压：2.3 V标称供电电压：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
宽度：3.5 mmuPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches：1

PCA9535DWR 数据手册

 浏览型号PCA9535DWR的Datasheet PDF文件第1页浏览型号PCA9535DWR的Datasheet PDF文件第3页浏览型号PCA9535DWR的Datasheet PDF文件第4页浏览型号PCA9535DWR的Datasheet PDF文件第5页浏览型号PCA9535DWR的Datasheet PDF文件第6页浏览型号PCA9535DWR的Datasheet PDF文件第7页 
PCA9535  
REMOTE 16-BIT I2C AND SMBus, LOW-POWER I/O EXPANDER  
WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS  
www.ti.com  
SCPS129E–AUGUST 2005–REVISED FEBRUARY 2007  
DESCRIPTION/ORDERING INFORMATION (CONTINUED)  
This 16-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3-V to 5.5-V VCC operation. It  
provides general-purpose remote I/O expansion for most microcontroller families via the I2C interface [serial  
clock (SCL), serial data (SDA)].  
The PCA9535 consists of two 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity  
Inversion (active-high or active-low operation) registers. At power on, the I/Os are configured as inputs. The  
system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data  
for each input or output is kept in the corresponding Input or Output Port register. The polarity of the Input Port  
register can be inverted with the Polarity Inversion register. All registers can be read by the system master.  
The system master can reset the PCA9535 in the event of a timeout or other improper operation by utilizing the  
power-on reset feature, which puts the registers in their default state and initializes the I2C/SMBus state  
machine.  
The PCA9535 open-drain interrupt (INT) output is activated when any input state differs from its corresponding  
Input Port register state and is used to indicate to the system master that an input state has changed.  
INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the  
remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via  
the I2C bus. Thus, the PCA9535 can remain a simple slave device.  
The device outputs (latched) have high-current drive capability for directly driving LEDs. The device has low  
current consumption.  
Although pin-to-pin and I2C address compatible with the PCF8575, software changes are required due to the  
enhancements.  
The PCA9535 is identical to the PCA9555, except for the removal of the internal I/O pullup resistor, which  
greatly reduces power consumption when the I/Os are held low.  
Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I2C address and allow up to eight  
devices to share the same I2C bus or SMBus. The fixed I2C address of the PCA9535 is the same as the  
PCA9555, PCF8575, PCF8575C, and PCF8574, allowing up to eight of these devices in any combination to  
share the same I2C bus or SMBus.  
2
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