TheꢀPCA9535Cꢀanꢀopen-drainꢀversionꢀofꢀtheꢀ
PCA9535,ꢀusedꢀtoꢀdriveꢀLEDsꢀwithoutꢀsourcingꢀ
current.ꢀTheꢀsystemꢀmasterꢀcanꢀenableꢀtheꢀI/Oꢀasꢀ
inputsꢀorꢀoutputsꢀbyꢀwritingꢀtoꢀtheꢀI/Oꢀconfigurationꢀ
bits.ꢀDataꢀforꢀeachꢀinputꢀorꢀoutputꢀisꢀkeptꢀinꢀtheꢀ
correspondingꢀinputꢀorꢀoutputꢀregister.ꢀTheꢀpolarityꢀ
ofꢀtheꢀreadꢀregisterꢀcanꢀbeꢀinvertedꢀusingꢀtheꢀ
polarity-inversionꢀregister.ꢀAllꢀregistersꢀcanꢀbeꢀreadꢀ
byꢀtheꢀsystemꢀmaster.
A0
A1
A2
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
8-BIT
INPUT/
OUTPUT
PORTS
I2C/SMBus
CONTROL
SCL
INPUT
FILTER
SDA
WRITE pulse
READ pulse
V
DD
V
INT
POWER-ON
RESET
LP
FILTER
INT
V
SS
Allꢀtheꢀdevicesꢀareꢀpin-to-pinꢀandꢀI2C-addressꢀ
compatibleꢀwithꢀtheꢀNXPꢀPCF857Xꢀseries,ꢀbutꢀ
variousꢀenhancementsꢀmakeꢀsoftwareꢀchangesꢀ
necessaryꢀ(seeꢀapplicationꢀnoteꢀAN469).
Note: All I/Os are set to inputs at reset
Blockꢀdiagram
Pull-up resistor removed from PCA9554/55 output structure.
OUTPUT PORT
REGISTER DATA
DATA FROM
SHIFT REGISTER
CONFIGURATION
REGISTER
V
DD
Theꢀopen-drainꢀinterruptꢀoutputꢀisꢀactivatedꢀwhenꢀ
anyꢀinputꢀstateꢀdiffersꢀfromꢀitsꢀcorrespondingꢀinputꢀ
portꢀregisterꢀstate.ꢀTheꢀoutputꢀnotifiesꢀtheꢀsystemꢀ
masterꢀthanꢀanꢀinputꢀstateꢀhasꢀchanged.ꢀ
DATA FROM
SHIFT REGISTER
100 K7
Q1
D
Q
FF
OUTPUT
PORT
WRITE
CONFIGURATION
PULSE
C
Q
K
REGISTER
D
Q
Q
FF
I/O0TO I/O7
C
WRITE PULSE
K
INPUT
PORT
REGISTER
Threeꢀhardwareꢀpinsꢀ(A0,ꢀA1,ꢀA2)ꢀvaryꢀtheꢀfixedꢀI2C-
busꢀaddressꢀandꢀallowꢀupꢀtoꢀeightꢀofꢀtheseꢀdevices,ꢀ
inꢀanyꢀcombination,ꢀtoꢀshareꢀtheꢀsameꢀI2C/SMBus.ꢀ
Q2
V
SS
D
Q
Q
INPUT PORT
REGISTER DATA
FF
C
READ PULSE
K
TO INT
POLARITY
INVERSION
REGISTER
POLARITY
REGISTER DATA
DATA FROM
D
Q
V
INT
A1
1
2
24
SHIFT REGISTER
DD
FF
23 SDA
22 SCL
WRITE
POLARITY
PULSE
C
Q
K
3
A2
4
21 A0
I/O0.0
I/O0.1
I/O0.2
I/O0.3
I/O0.4
I/O0.5
I/O0.6
I/O0.7
V
16
A0
A1
1
2
3
4
5
6
7
8
DD
5
20 I/O1.7
19 I/O1.6
NOTE: At Power-on Reset, all registers return to default values.
15 SDA
14 SCL
13 INT
12 I/07
11 I/06
6
A2
7
18
I/O1.5
I/00
I/01
I/02
I/03
8
17 I/O1.4
16 I/O1.3
15 I/O1.2
14 I/O1.1
SimplifiedꢀschematicꢀofꢀI/O0ꢀtoꢀI/O7
9
10
11
12
10
9
I/05
I/04
V
SS
V
13
I/O1.0
SS
TheꢀoutputsꢀonꢀtheꢀPCA9534/35ꢀsinkꢀ25ꢀmAꢀandꢀsourceꢀ10ꢀmA.ꢀTheꢀ
open-drainꢀoutputsꢀonꢀtheꢀPCA9535Cꢀsinkꢀ25ꢀmA,ꢀbutꢀdon’tꢀprovideꢀanyꢀ
sourceꢀcurrent.ꢀꢀ
SLAVE ADDRESS
0
1
0
0
A2
A1
A0 R/W
FIXED
PROGRAMMABLE
PCA9534/35/35C
TheꢀfunctionalꢀdiagramsꢀandꢀI/Oꢀschematicsꢀforꢀallꢀtheꢀdevicesꢀareꢀtheꢀ
same,ꢀexceptꢀtheꢀPCA9535ꢀhasꢀtwoꢀ8-bitꢀblocksꢀofꢀI/OꢀandꢀtheꢀPCA9535Cꢀ
hasꢀtheꢀupperꢀtransistorꢀ(Q1)ꢀdisconnected.
PinꢀconfigurationsꢀandꢀI2Cꢀaddress
Order information
Package
Container
PCA9534
PCA9535
PCA9535C
Tube
T & R
PCA9534D
PCA9534D-T
PCA9535D
PCA9535D-T
PCA9535CD
PCA9535CD-T
SO
Tube
T & R
PCA9534PW
PCA9534PW-T
PCA9535PW
PCA9535PW-T
PCA9535CPW
PCA9535CPW-T
TSSOP
HVQFN
T & R
T & R
PCA9534BS-T
PCA9535BS-T
PCA9535HF-T
HWQFN
PCA9535CHF-T
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© 2007 NXP N.V.
Date of release: June 2007
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