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PCA8574N,112 PDF预览

PCA8574N,112

更新时间: 2023-02-26 15:35:12
品牌 Logo 应用领域
恩智浦 - NXP PC
页数 文件大小 规格书
27页 160K
描述
PCA8574/74A - Remote 8-bit I/O expander for I²C-bus with interrupt DIP 16-Pin

PCA8574N,112 数据手册

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PCA8574/74A  
NXP Semiconductors  
Remote 8-bit I/O expander for I2C-bus with interrupt  
Table 5.  
PCA8574A address map  
A6  
0
A5  
1
A4  
1
A3  
1
A2  
0
A1  
0
A0  
0
Address  
38h  
0
1
1
1
0
0
1
39h  
0
1
1
1
0
1
0
3Ah  
0
1
1
1
0
1
1
3Bh  
0
1
1
1
1
0
0
3Ch  
3Dh  
3Eh  
0
1
1
1
1
0
1
0
1
1
1
1
1
0
0
1
1
1
1
1
1
3Fh  
8. I/O programming  
8.1 Quasi-bidirectional I/O architecture  
The PCA8574/74A’s 8 ports (see Figure 2) are entirely independent and can be used  
either as input or output ports. Input data is transferred from the ports to the  
microcontroller in the Read mode (see Figure 9). Output data is transmitted to the ports in  
the Write mode (see Figure 8).  
This quasi-bidirectional I/O can be used as an input or output without the use of a control  
signal for data directions. At power-on the I/Os are HIGH. In this mode only a current  
source (IOH) to VDD is active. An additional strong pull-up to VDD (Itrt(pu)) allows fast rising  
edges into heavily loaded outputs. These devices turn on when an output is written HIGH,  
and are switched off by the negative edge of SCL. The I/Os should be HIGH before being  
used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as  
inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the  
write mode.  
Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large  
current (IOL) will flow to VSS  
.
8.2 Writing to the port (Output mode)  
To write, the master (microcontroller) first addresses the slave device. By setting the last  
bit of the byte containing the slave address to logic 0 the write mode is entered. The  
PCA8574/74A acknowledges and the master sends the data byte for P7 to P0 and is  
acknowledged by the PCA8574/74A. The 8-bit data is presented on the port lines after it  
has been acknowledged by the PCA8574/74A.  
The number of data bytes that can be sent successively is not limited. The previous data  
is overwritten every time a data byte has been sent.  
PCA8574_PCA8574A_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 14 May 2007  
7 of 27  

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