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P1P2861AG-16TR PDF预览

P1P2861AG-16TR

更新时间: 2024-02-14 01:04:38
品牌 Logo 应用领域
安森美 - ONSEMI 时钟发生器
页数 文件大小 规格书
7页 174K
描述
Phase Synchronizing Clock Generator

P1P2861AG-16TR 数据手册

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P1P3800A  
Phase Synchronizing Clock  
Generator  
Product Description  
P1P3800A is a Phase Synchronizing clock generator that generates  
four outputs from an input clock. Output frequency will be a divide by  
two of the input clock. The phase of the output clocks is selectable  
through four select signals S1, S2, S3 and S4. Refer to Output Clock  
Selection Table. The outputs will go ‘low’ when all the select signals  
are ‘low’. The transition to a new state of the output will be ‘glitch  
free’ when the select inputs change state. A Power Down signal  
enables the device to be driven to a power save mode, when active.  
The device works over a supply voltage range of 3.8 V 5.5 V. The  
device is available in a 12Lead 3mmx3mm WQFN package and  
operates over -40°C to +85°C.  
http://onsemi.com  
MARKING  
DIAGRAM  
P1P  
3800A  
ALYWG  
G
1
WQFN12  
CASE 510AH  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
Features  
Input Clock Frequency:  
120 Hz 240 Hz (External Reference Clock)  
Output Clock Frequency:  
60 Hz 120 Hz  
(Note: Microdot may be in either location)  
4 Clock Outputs  
PIN CONFIGURATION  
4 Two Level Controls to Select Sets of Clock Outputs  
Output Buffer Drive Strength: 8 mA  
Supply Voltage: 3.8 V 5.5 V  
Power Down for Power Save  
12 11 10  
12Lead 3mmx3mm WQFN Package  
Operating Temperature Range: -40°C to +85°C  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
S2  
S1  
1
2
3
9
8
7
PD#  
CLKOUT4  
CLKOUT3  
P1P3800A  
CLKIN  
4
5
6
Application  
P1P3800A can be used in applications where Phase Synchronization  
is needed.  
(TopView)  
ORDERING INFORMATION  
S [1:4]  
PD#  
V
DD  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
Digital Logic  
& Divider  
CLKOUT [1:4]  
CLKIN  
GND  
Figure 1. Block Diagram  
© Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
January, 2012 Rev. 1  
P1P3800A/D  

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