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OPA992_V02 PDF预览

OPA992_V02

更新时间: 2022-06-24 15:41:27
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德州仪器 - TI /
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描述
OPAx992 40-V Rail-to-Rail Input/Output, Low Offset Voltage, Low Noise Op Amp

OPA992_V02 数据手册

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OPA992, OPA2992, OPA4992  
SBOSA10B – JUNE 2021 – REVISED DECEMBER 2021  
www.ti.com  
6 Specifications  
6.1 Absolute Maximum Ratings  
over operating ambient temperature range (unless otherwise noted)(1)  
MIN  
0
MAX  
42  
UNIT  
V
Supply voltage, VS = (V+) – (V–)  
Common-mode voltage(3)  
(V–) – 0.5  
(V+) + 0.5  
VS + 0.2  
10  
V
Signal input pins  
Differential voltage(3)  
Current(3)  
V
–10  
V–  
mA  
V
Shutdown pin voltage(4)  
(V–) + 20  
Output short-circuit(2)  
Continuous  
Operating ambient temperature, TA  
Junction temperature, TJ  
Storage temperature, Tstg  
–55  
–65  
150  
150  
150  
°C  
°C  
°C  
(1) Operating the device beyond the ratings listed under Absolute Maximum Ratings will cause permanent damage to the device.  
These are stress ratings only, based on process and design limitations, and this device has not been designed to function outside  
the conditions indicated under Recommended Operating Conditions. Exposure to any condition outside Recommended Operating  
Conditions for extended periods, including absolute-maximum-rated conditions, may affect device reliability and performance.  
(2) Short-circuit to ground, one amplifier per package. Extended short-circuit current, especially with higher supply voltage, can cause  
excessive heating and eventual destruction.  
(3) Input pins are diode-clamped to the power-supply rails. Input signals that may swing more than 0.5 V beyond the supply rails must be  
current limited to 10 mA or less.  
(4) Cannot exceed V+.  
6.2 ESD Ratings  
VALUE  
±2500  
±1500  
UNIT  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)  
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2)  
V(ESD)  
Electrostatic discharge  
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
6.3 Recommended Operating Conditions  
over operating ambient temperature range (unless otherwise noted)  
MIN  
2.7  
MAX  
UNIT  
VS  
VI  
Supply voltage, (V+) – (V–)  
40  
(V+)  
V
V
Common mode voltage range  
(V–)  
1.1  
VIH  
VIL  
TA  
High level input voltage at shutdown pin (amplifier disabled)  
Low level input voltage at shutdown pin (amplifier enabled)  
Specified temperature  
(V–) + 20 (1)  
0.2  
V
(V–)  
–40  
V
125  
°C  
(1) Cannot exceed V+.  
6.4 Thermal Information for Single Channel  
OPA992, OPA992S  
DBV  
(SOT-23)  
DCK  
(SC70)  
THERMAL METRIC(1)  
UNIT  
5 PINS  
185.4  
83.9  
6 PINS  
166.9  
83.9  
5 PINS  
198.1  
94.1  
RθJA  
RθJC(top)  
RθJB  
ψJT  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
52.5  
47.1  
45.3  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
25.4  
25.9  
16.9  
ψJB  
52.1  
47.0  
45.0  
Copyright © 2021 Texas Instruments Incorporated  
6
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Product Folder Links: OPA992 OPA2992 OPA4992  
 
 
 
 
 
 
 
 
 
 
 
 

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