Datasheet > MXT574DBF850M000RA

MXT574DBF850M000RA

更新时间： 2023-01-02 18:32:54

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
24页	742K
描述
PECL Output Clock Oscillator

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MXT574DBF850M000RA 数据手册

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MXT57

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings †

Supply Voltage......................................................................................................................................... –0.3V to + 4.0V

Input Voltage......................................................................................................................................–0.3V to V_DD+0.3V

ESD Protection (HBM)...............................................................................................................................................4 kV

ESD Protection (MM) ................................................................................................................................................400V

ESD Protection (CDM)............................................................................................................................................1.5 kV

† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.

This is a stress rating only and functional operation of the device at those or any other conditions above those indicated

in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended

periods may affect device reliability.

TABLE 1-1:

ELECTRICAL CHARACTERISTICS

Electrical Characteristics: V_DD= 2.375V to 3.63V, T_A= –40°C to +85°C with output terminated per output logic

type.

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Supply Voltage

(Note 1)

V_DD

2.375

—

3.63

—

120

130

Output enabled LVCMOS (no load).

LVPECL

Supply Current

I_DD

100

LVDS

105

HCSL

—

Output disabled (Tri-state)

A = ±5

B = ±2.5

A = ±8

B = ±5

Frequency

Stability

Inclusive of initial accuracy, temperature

drift, aging, shock and vibration.

∆f

ppm

From 90% V_DDto valid clock output,

Start-up Time

t_SU

—

T = +25^°C

V_IH

V_IL

—

V_DD+0.3

0.8

Input logic-high

Input logic-low

Input Logic

Levels

–0.3

Enable Active

High Option

(Note 2)

—

kΩ

Pull-up resistor on Pin 1 or 2

Enable Active

Low Option

(Note 3)

Pull-down resistor on Pin 1 or 2

LVCMOS

Frequency

f₀

2.5

—

250

—

MHz

—

450

110

12 kHz to 20 MHz @ 156.25 MHz

1.875 MHz to 5 MHz @ 156.25 MHz

Integrated Phase

Noise (Random)

ϕj

fs_RMS

—

Output High

Voltage

V_OH

V_OL

V_DD– 0.8

—

R_L= 50ꢀ

Output Low

Voltage

0.6

Single-ended

Output Rise/Fall

Time

t_r/t_f

100

—

500

—

Duty Cycle

LVPECL

SYM

Frequency

f₀

2.5

—

850

—

MHz

—

480

100

12 kHz to 20 MHz @ 200 MHz

1.875 MHz to 20 MHz @ 200 MHz

Integrated Phase

Noise (Random)

ϕj

fs_RMS

—

 2018 Microchip Technology Inc.

DS20006037A-page 3

1 234 5 6 7...24

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