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MX53L03202L-50

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MX53L03202L-50 技术参数

MX53L03202

3.OVERVIEW

The following diagram shows an overview of the MX53L03202 internal architecture:

VDD

CMD

CLK

DAT

MODE_SEL

Interface driver

VDD

CID[127:0]

RCA[15:0]

CSD[127:0]

MultiMediaCard

interface

reset

controller

reset

Memory core interface

Memory core

Figure 1 : MX53L03202 architecture

All controllers in the MX53L03202 are clocked by the interface signal CLK. The card is controlled by the three line

MultiMediaCard interface containing the signals: CMD, CLK, DAT (see "Chapter 4: Inter-face" for more details). For

the identification of the MX53L03202 in a stack of MultiMediaCards a card identification register (CID) and a relative

card address register (RCA) is foreseen. An additional register contains different types of operation parameters. This

registeriscalledcardspecificdataregister(CSD).ThecommunicationusingtheMultiMediaCardlinestoaccesseither

the memory field or the registers is defined by the MultiMediaCard standard (see "Chapter 6: Communication").

Thecardhasitsownpowerondetectionunit.Noadditionalmasterresetsignalisrequiredtosetupthecardafterpower

on. ItisprotectedagainstshortcutduringinsertionandremovalwhiletheMulti-MediaCardsystemispoweredup(see

"Chapter 9: Power supply").

P/N: PM1002

REV. 1.4, NOV. 24, 2003

123 4 5 6 7...56

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