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MSM7507-01 PDF预览

MSM7507-01

更新时间: 2024-02-27 12:09:03
品牌 Logo 应用领域
冲电气 - OKI /
页数 文件大小 规格书
18页 139K
描述
Single Rail CODEC

MSM7507-01 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.67Is Samacsys:N
压伸定律:A/MU-LAW滤波器:YES
JESD-30 代码:R-PDSO-G20长度:10 mm
功能数量:1端子数量:20
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-30 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH认证状态:Not Qualified
座面最大高度:2 mm标称供电电压:5 V
表面贴装:YES技术:CMOS
电信集成电路类型:PCM CODEC温度等级:OTHER
端子形式:GULL WING端子节距:0.95 mm
端子位置:DUAL宽度:5 mm
Base Number Matches:1

MSM7507-01 数据手册

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¡ Semiconductor  
MSM7507-01/02/03  
RSYNC  
Receive synchronizing signal input.  
Eight required bits are selected from serial PCM signals on the PCMIN pin by the receive  
synchronizing signal.  
Signals in the receive section are synchronized by this synchronizing signal. This signal must be  
synchronized in phase with the BCLK. The frequency should be 8 kHz ±50 ppm to guarantee the  
AC characteristics which are mainly the frequency characteristics of the receive section.  
However, if the frequency characteristic of an applied system is not specified exactly, this device  
can operate in the range of 8 kHz ±2 kHz, but the electrical characteristics in this specification are  
not guaranteed.  
XSYNC  
Transmit synchronizing signal input.  
The PCM output signal from the PCMOUT pin is output in synchronization with this transmit  
synchronizing signal. This synchronizing signal triggers the PLL and synchronizes all timing  
signals of the transmit section.  
This synchronizing signal must be synchronized in phase with BCLK.  
The frequency should be 8 kHz ±50 ppm to guarantee the AC characteristics which are mainly  
the frequency characteristics of the transmit section.  
However, if the frequency characteristic of an applied system is not specified exactly, this device  
can operate in the range of 8 kHz ±2 kHz, but the electrical characteristics in this specification are  
not guaranteed.  
Setting this signal to logic "1" or "0" drives both transmit and receive circuits to the power saving  
state.  
6/18  

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