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MPC8572ECLVTAVND

更新时间: 2024-02-22 13:03:20
品牌 Logo 应用领域
飞思卡尔 - FREESCALE PC
页数 文件大小 规格书
140页 1412K
描述
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications

MPC8572ECLVTAVND 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:33 X 33 MM, 1 MM PITCH, LEAD FREE, PLASTIC, FCBGA-1023
Reach Compliance Code:not_compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.67
地址总线宽度:32位大小:32
边界扫描:YES最大时钟频率:133 MHz
外部数据总线宽度:32格式:FLOATING POINT
集成缓存:YESJESD-30 代码:S-PBGA-B1023
JESD-609代码:e2长度:33 mm
低功率模式:YES湿度敏感等级:3
端子数量:1023封装主体材料:PLASTIC/EPOXY
封装代码:HBGA封装形状:SQUARE
封装形式:GRID ARRAY, HEAT SINK/SLUG峰值回流温度(摄氏度):245
座面最大高度:3.38 mm速度:1500 MHz
最大供电电压:1.155 V最小供电电压:1.045 V
标称供电电压:1.1 V表面贴装:YES
技术:CMOS端子面层:Tin/Silver (Sn/Ag)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
宽度:33 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR
Base Number Matches:1

MPC8572ECLVTAVND 数据手册

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Freescale Semiconductor  
Technical Data  
Document Number: MPC8572EEC  
Rev. 4, 06/2010  
MPC8572E PowerQUICC III  
Integrated Processor  
Hardware Specifications  
Contents  
1 Overview  
This section provides a high-level overview of the features  
of the MPC8572E processor. Figure 1 shows the major  
functional units within the MPC8572E.  
1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
2. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . 10  
3. Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 15  
4. Input Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
5. RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 18  
6. DDR2 and DDR3 SDRAM Controller . . . . . . . . . . . 19  
7. DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
8. Ethernet: Enhanced Three-Speed Ethernet (eTSEC) 28  
1.1  
Key Features  
9. Ethernet Management Interface  
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . 50  
The following list provides an overview of the MPC8572E  
feature set:  
10. Local Bus Controller (eLBC) . . . . . . . . . . . . . . . . . . 53  
11. Programmable Interrupt Controller . . . . . . . . . . . . . 65  
12. JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65  
13. I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67  
14. GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69  
15. High-Speed Serial Interfaces (HSSI) . . . . . . . . . . . . 71  
16. PCI Express . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82  
17. Serial RapidIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90  
18. Package Description . . . . . . . . . . . . . . . . . . . . . . . . 100  
19. Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118  
20. Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122  
21. System Design Information . . . . . . . . . . . . . . . . . . 125  
22. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 135  
23. Document Revision History . . . . . . . . . . . . . . . . . . 137  
Two high-performance 32-bit Book E–enhanced  
cores that implement the Power Architecture®  
technology:  
— Each core is identical to the core within the  
MPC8548 processor.  
— 32-Kbyte L1 instruction cache and 32-Kbyte L1  
data cache with parity protection. Caches can be  
locked entirely or on a per-line basis, with  
separate locking for instructions and data.  
— Signal-processing engine (SPE) APU (auxiliary  
processing unit). Provides an extensive  
instruction set for vector (64-bit) integer and  
fractional operations. These instructions use both  
© 2010 Freescale Semiconductor, Inc. All rights reserved.  

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