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MP2324 PDF预览

MP2324

更新时间: 2022-02-26 13:20:36
品牌 Logo 应用领域
芯源 - MPS /
页数 文件大小 规格书
17页 1032K
描述
High Efficiency 2A, 24V, 500kHz Synchronous Step-Down Converter

MP2324 数据手册

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MP2324 24V, 2A SYNC STEP-DOWN CONVERTER  
PIN FUNCTIONS  
Package  
Pin #  
Name Description  
Power Good Output. The output of this pin is an open drain. Its pulled up to Vcc by  
external resistor when the output voltage exceeds 90% of the normal voltage. There is a  
1
PG  
IN  
40μs delay between FB≥90% to the PG pin goes high.  
Supply Voltage. The IN pin supplies power for internal MOSFET and regulator. The  
MP2324 operates from a +4.5V to +24V input rail. Requires a low-ESR, and low  
inductance capacitor (C1) to decouple the input rail. Place the input capacitor very close to  
this pin and connect it with wide PCB traces and multiple vias.  
2
Switch Output. Connect to the inductor and bootstrap capacitor. This pin is driven up to  
VIN by the high-side switch during the PWM duty cycle ON time. The inductor current  
drives the SW pin negative during the OFF time. The ON resistance of the low-side switch  
and the internal body diode fixes the negative voltage. Connect using wide PCB traces and  
multiple vias.  
3
4
SW  
System Ground. This pin is the reference ground of the regulated output voltage.  
For this reason care must be taken in PCB layout. Suggested to be connected to GND with  
copper and vias.  
GND  
Bootstrap. A capacitor and a 20Ω resistor connected between SW and BST pins are  
required to form a floating supply across the high-side switch driver.  
5
6
7
BST  
EN/SYNC  
VCC  
EN=1 to enable the MP2324. External clock can be applied to EN pin for changing  
switching frequency. For automatic start-up, connect EN pin to VIN with a 100kΩ resistor.  
Bias Supply. Decouple with 0.1μF-0.22μF cap. And the capacitance should be no more  
than 0.22μF  
Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets  
the output voltage. To prevent current limit run away during a short circuit fault condition  
the frequency fold-back comparator lowers the oscillator frequency when the FB voltage is  
below 400mV.  
8
FB  
MP2324 Rev. 1.0  
12/4/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
7

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