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MM54C221J/883 PDF预览

MM54C221J/883

更新时间: 2024-01-16 20:49:12
品牌 Logo 应用领域
德州仪器 - TI 时钟输入元件逻辑集成电路
页数 文件大小 规格书
6页 137K
描述
CMOS SERIES, DUAL MONOSTABLE MULTIVIBRATOR, CDIP16, CERAMIC, DIP-16

MM54C221J/883 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.89
JESD-30 代码:R-XDIP-T16JESD-609代码:e0
逻辑集成电路类型:MONOSTABLE MULTIVIBRATOR端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
筛选级别:MIL-STD-883 Class C子类别:Prescaler/Multivibrators
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

MM54C221J/883 数据手册

 浏览型号MM54C221J/883的Datasheet PDF文件第2页浏览型号MM54C221J/883的Datasheet PDF文件第3页浏览型号MM54C221J/883的Datasheet PDF文件第4页浏览型号MM54C221J/883的Datasheet PDF文件第5页浏览型号MM54C221J/883的Datasheet PDF文件第6页 
February 1988  
MM54C221/MM74C221 Dual Monostable Multivibrator  
General Description  
The MM54C221/MM74C221 dual monostable multivibrator  
is a monolithic complementary MOS integrated circuit. Each  
multivibrator features a negative-transition-triggered input  
and a positive-transition-triggered input, either of which can  
be used as an inhibit input, and a clear input.  
Pulse stability will be limited by the accuracy of external  
timing components. The pulse width is approximately de-  
&
information and applications, see AN-138.  
fined by the relationship t  
W(OUT)  
C
R
EXT EXT  
. For further  
Features  
Y
Once fired, the output pulses are independent of further  
transitions of the A and B inputs and are a function of the  
Wide supply voltage range  
4.5V to 15V  
1.0V  
external timing components C  
EXT  
width is stable over a wide range of temperature and V  
and R . The pulse  
EXT  
Y
Guaranteed noise margin  
.
Y
CC  
High noise immunity  
0.45 V (typ.)  
CC  
Y
Low power TTL compatibility  
fan out of 2  
driving 74L  
Connection Diagrams  
Timing Component  
Dual-In-Line Package  
TL/F/5904–1  
TL/F/5904–2  
Top View  
Order Number MM54C221 or MM74C221  
Truth Table  
Inputs  
Outputs  
Clear  
A
X
B
X
Q
L
Q
H
e
e
e
e
e
e
e
H
High level  
L
X
X
H
H
L
Low level  
Transition from low to high  
Transition from high to low  
One high level pulse  
One low level pulse  
Irrelevant  
u
v
É
ß
X
H
X
X
L
H
L
L
H
L
É
É
ß
ß
u
H
v
C
1995 National Semiconductor Corporation  
TL/F/5904  
RRD-B30M105/Printed in U. S. A.  

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