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MCZ33903CS5EKR2 PDF预览

MCZ33903CS5EKR2

更新时间： 2024-01-24 10:36:33
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
8页 278K
描述
System Basis Chip,LIN, 2x 5.0 V/400mA LDOs, 2/3 wakeup, SOIC 32, Reel

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中文翻译

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MCZ33903CS5EKR2 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Transferred包装说明：,
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.67
模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUITJESD-609代码：e3
湿度敏感等级：3峰值回流温度（摄氏度）：260
端子面层：Matte Tin (Sn)处于峰值回流温度下的最长时间：40
Base Number Matches：1

MCZ33903CS5EKR2 数据手册

 浏览型号MCZ33903CS5EKR2的Datasheet PDF文件第2页浏览型号MCZ33903CS5EKR2的Datasheet PDF文件第3页浏览型号MCZ33903CS5EKR2的Datasheet PDF文件第4页浏览型号MCZ33903CS5EKR2的Datasheet PDF文件第5页浏览型号MCZ33903CS5EKR2的Datasheet PDF文件第6页浏览型号MCZ33903CS5EKR2的Datasheet PDF文件第7页 
Analog, Mixed-Signal and Power Management  
MC33903/4/5  
System Basis Chip Gen2 with High Speed CAN and  
LIN Interface  
Overview  
The MC33903/4/5 is the second generation  
family of System Basis Chips, which combine  
several features and enhance present module  
designs. The device works as an advanced  
MC33903/4/5 Block Diagram  
MCU Voltage Regulator (VDD)  
power management unit for the MCU and  
additional integrated circuits such as sensors  
Internal CAN Regulator (VCAN  
)
and CAN transceivers. It has a built-in enhanced  
high speed CAN interface (ISO11898-2 and -5),  
with local and bus failure diagnostics, protection,  
and fail safe operation mode. The SBC may  
include one or two LIN 2.1/J2602-2 interfaces  
with LIN master terminal outputs. It includes  
wake-up input pins than can also be configured  
as output drivers for flexibility.  
Legend  
Low Power Modes  
SPI Adv W/D  
Secured State Machine  
Flexible (I/O)  
33903  
33903S  
33903D  
33904  
This device implements multiple Low Power  
modes with very low-current consumption. In  
addition, the device is part of a family concept  
where pin compatibility, among the various  
devices with and without LIN interfaces, adds  
versatility to module design.  
CAN High Speed  
Power Sharing (VDD BALLAST)  
33905S  
33905D  
Ballast Regulator (VAUX  
LIN 1  
)
The MC33903/4/5 also implements an  
innovative and advanced fail-safe state machine  
and concept solution. This family of devices are  
supported by an enablement ecosystem that  
includes an evaluation board, software interface,  
EMC/ESD conformance reports and training  
material that allows a faster time to market and  
eases your designs.  
LIN 2  
12345678

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MCZ33903CS5EKR2 替代型号

型号 品牌 替代类型 描述 数据表
MCZ33903CS5EK NXP

完全替代

 System Basis Chip, LIN, 2x 5.0 V/400mA LDOs, 2/3 wakeup, SOIC 32, Rail

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