Datasheet > MC68SEC000CFU10

MC68SEC000CFU10

更新时间： 2024-01-18 20:42:58

阅读下载

获取价格

如果您发现信息不准确，欢迎纠错

MC68SEC000CFU10 技术参数

生命周期：	Transferred	零件包装代码：	QFP
包装说明：	QFP,	针数：	64
Reach Compliance Code：	unknown	风险等级：	5.52
其他特性：	CAN ALSO OPERATE WITH 5V SUPPLY	地址总线宽度：	24
位大小：	32	最大时钟频率：	10 MHz
外部数据总线宽度：	16	格式：	FIXED POINT
集成缓存：	NO	JESD-30 代码：	S-PQFP-G64
长度：	14 mm	低功率模式：	YES
端子数量：	64	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	QFP	封装形状：	SQUARE
封装形式：	FLATPACK	认证状态：	Not Qualified
座面最大高度：	2.45 mm	速度：	10 MHz
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	宽度：	14 mm
uPs/uCs/外围集成电路类型：	MICROPROCESSOR	Base Number Matches：	1

After the previous steps are completed, the MC68SEC000 will remain in the low-power mode until it

recognizes the appropriate interrupt . External logic will also have to poll IPLB2–IPLB0 to detect the proper

interrupt. When the correct interrupt level is received, the following steps will bring the processor out of the

low-power mode:

1. Restart the system clock if it was stopped.

2. Wait for the system clock to become stable.

3. Assert the RESTART signal. This will cause the processor’s clock to start on the next falling edge of

the system clock. Figure 6 shows the timing for bringing the processor out of the low-power mode.

Both the RESTART and RESET signals are subject to the asynchronous setup time as specified in

the Electrical Characteristics section of this addendum.

WARNING

The system clock must be stable before the RESTART signal is asserted

to prevent glitches in the clock. An unstable clock can cause unpredictable

results in the MC68SEC000.

CLK

CPU_CLK

RESTART

Figure 6. MC68SEC000 Clock Start Timing

4. If the MC68SEC000 was placed in a three-state condition, the BR signal must be negated before the

processor can begin executing instructions.

M68000 USER’S MANUAL ADDENDUM

MOTOROLA

1...4 5 678 9 10...26

下载PDF