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MC14572UBD PDF预览

MC14572UBD

更新时间: 2024-02-05 17:39:52
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 162K
描述
Hex Gate

MC14572UBD 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.3
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.41
其他特性:MIXED WITH 2-IN NOR & 2-IN NAND系列:4000/14000/40000
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER功能数量:6
输入次数:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/15 V
Prop。Delay @ Nom-Sup:180 ns传播延迟(tpd):180 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2.05 mm子类别:Gates
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.275 mm
Base Number Matches:1

MC14572UBD 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 620  
The MC14572UB hex functional gate is constructed with MOS P–channel  
and N–channel enhancement mode devices in a single monolithic structure.  
These complementary MOS logic gates find primary use where low power  
dissipation and/or high noise immunity is desired. The chip contains four  
inverters, one NOR gate and one NAND gate.  
P SUFFIX  
PLASTIC  
CASE 648  
Diode Protection on All Inputs  
Single Supply Operation  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
NOR Input Pin Adjacent to V  
SS  
NAND Input Pin Adjacent to V  
NOR Output Pin Adjacent to Inverter Input Pin For OR Application  
NAND Output Pin Adjacent to Inverter Input Pin For AND Application  
Capable of Driving Two Low–power TTL Loads or One Low–Power  
Schottky TTL Load over the Rated Temperature Range  
D SUFFIX  
SOIC  
CASE 751B  
Pin to Simplify Use As An Inverter  
Pin to Simplify Use As An Inverter  
DD  
ORDERING INFORMATION  
MC14XXXUBCP  
MC14XXXUBCL  
MC14XXXUBD  
Plastic  
Ceramic  
SOIC  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
T
A
= – 55° to 125°C for all packages.  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
V
DD  
– 0.5 to + 18.0  
LOGIC DIAGRAM  
V , V  
in out  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
I , I  
in out  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
2
4
1
P
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
D
T
stg  
– 65 to + 150  
260  
3
5
9
T
Lead Temperature (8–Second Soldering)  
C
L
* Maximum Ratings are those values beyond which damage to the device may occur.  
Temperature Derating:  
6
7
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
CIRCUIT SCHEMATIC  
10  
12  
V
V
DD  
DD  
V
DD  
11  
13  
7
6
14  
15  
2
1
13  
V
V
= PIN 16  
= PIN 8  
SS  
14  
15  
DD  
5
V
SS  
V
V
SS  
SS  
REV 3  
1/94  
Motorola, Inc. 1995  

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