19-1111; Rev 0; 8/96
MAX3 6 8 1 Eva lu a t io n Kit
Evluates:MAX3681
_______________Ge n e ra l De s c rip t io n
____________________________Fe a t u re s
The MAX3681 evaluation kit (EV kit) simplifies evalua-
tion of the MAX3681 622Mbps, SDH/SONET 1:4 deseri-
alizer. The EV kit requires only a single +3.3V supply
and includes all the external components necessary to
interface with 3.3V PECL and LVDS logic. The board
can be connected directly to the output of a clock-and-
data-recovery circuit (such as the MAX3675) and to the
input of an LVDS device (such as an overhead termina-
tion circuit). A signal generator or stimulus system can
b e us e d with a n os c illos c op e , to e va lua te the
MAX3681’s basic functionality.
♦ Single +3.3V Supply
♦ Inputs and Outputs Terminated for Interfacing
with 3.3V PECL and LVDS Logic
♦ Fully Assembled and Tested
_______________De t a ile d De s c rip t io n
The MAX3681 EV kit s imp lifie s e va lua tion of the
MAX3681. The EV kit operates from a single +3.3V sup-
ply and includes all the external components neces-
sary to interface with 3.3V PECL and LVDS logic.
Each PECL input (SCLK+, SCLK-, SD+, SD-) is termi-
nated on the EV board with the Thevenin equivalent of
______________Ord e rin g In fo rm a t io n
50Ω to (V
- 2V). These inputs can be driven directly
PART
TEMP. RANGE
BOARD TYPE
CC
by the output of any 3.3V PECL device, such as a
clock-and-data-recovery circuit (e.g., the MAX3675).
MAX3681EVKIT-SO
-40°C to +85°C
Surface Mount
All LVDS outputs (PCLK+, PCLK-, PD_+, PD_-) are dif-
ferentially terminated with 100Ω resistors between com-
plementary outputs. Each output can directly drive an
LVDS input or a high-impedance input oscilloscope
(see the section Connecting LVDS Outputs to 50Ω
Input Oscilloscopes). When driving an LVDS input that
already includes 100Ω differential termination, remove
the termination resistor corresponding to the appropri-
ate LVDS output.
____________________Co m p o n e n t Lis t
DESIGNATION QTY
DESCRIPTION
C1–C4, C7
5
0.1µF ceramic capacitors
33µF, 6.3V tantalum capacitor
Sprague 293D336X06R3C2
C5
1
C6
1
4
2.2µF ceramic capacitor
The synchronization inputs (SYNC+, SYNC-) are inter-
nally terminated LVDS inputs with 100Ω differential
input resistance. Ensure that LVDS devices driving
these inputs are not redundantly terminated.
C8–C11
J1–J16
100pF ceramic capacitors
SMA connectors (PC edge mount)
16
56nH inductor
Coilcraft 0805CS-560
L1
1
All signal inputs and outputs use coupled 50Ω trans-
mission lines. All input signal lines are of equal length
to minimize propagation-delay skew. Likewise, all out-
put signal lines are of equal length.
R1, R3, R5, R7
R2, R4, R6, R8
R9–R13
4
4
5
1
2
1
130Ω, 5% resistors
82Ω, 5% resistors
100Ω, 5% resistors
MAX3681EAG
__________Ap p lic a t io n s In fo rm a t io n
U1
Co n n e c t in g LVDS Ou t p u t s t o
5 0 Ω In p u t Os c illo s c o p e s
+3.3V, GND
None
2-pin headers
MAX3681 data sheet
To monitor an LVDS signal on a 50Ω input oscilloscope,
remove the differential load resistor between the com-
plementary outputs and AC couple each output to an
oscilloscope input. For example, to observe the PD0
signal on a 50Ω input instrument, remove resistor R12
from the EV board and place a capacitor or DC block in
series with each output (PD0+ or PD0-) and the instru-
ment input. Do not connect MAX3681 outputs directly
to 50Ω inputs or terminations to ground. Choose a
coupling capacitor large enough in value to prevent pat-
tern-dependent distortion of the output signal.
______________Co m p o n e n t S u p p lie rs
SUPPLIER
Coilcraft
PHONE
FAX
(847) 639-6400
(603) 224-1961
(847) 639-1469
(603) 224-1430
Sprague
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800