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M27C1001-35L3 PDF预览

M27C1001-35L3

更新时间: 2024-01-26 01:41:29
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器
页数 文件大小 规格书
17页 115K
描述
128KX8 UVPROM, 35ns, CQCC32, CERAMIC, LCC-32

M27C1001-35L3 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:not_compliant风险等级:5.92
最长访问时间:35 nsI/O 类型:COMMON
JESD-30 代码:R-XQCC-N32JESD-609代码:e0
内存密度:1048576 bit内存宽度:8
端子数量:32字数:131072 words
字数代码:128000最高工作温度:125 °C
最低工作温度:-40 °C组织:128KX8
输出特性:3-STATE封装主体材料:CERAMIC
封装代码:QCCN封装等效代码:LCC32,.45X.55
封装形状:RECTANGULAR封装形式:CHIP CARRIER
电源:5 V最大待机电流:0.0001 A
子类别:EPROMs最大压摆率:0.03 mA
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
Base Number Matches:1

M27C1001-35L3 数据手册

 浏览型号M27C1001-35L3的Datasheet PDF文件第3页浏览型号M27C1001-35L3的Datasheet PDF文件第4页浏览型号M27C1001-35L3的Datasheet PDF文件第5页浏览型号M27C1001-35L3的Datasheet PDF文件第7页浏览型号M27C1001-35L3的Datasheet PDF文件第8页浏览型号M27C1001-35L3的Datasheet PDF文件第9页 
M27C1001  
(1)  
Table 8B. Read Mode AC Characteristics  
(TA = 0 to 70°C, –40 to 85°C or –40 to 125°C; V = 5V ± 5% or 5V ± 10%; V = V )  
CC  
PP  
CC  
M27C1001  
-12/-15/  
-20/-25  
Symbol  
Alt  
Parameter  
Test Condition  
-80  
-90  
-10  
Unit  
Min Max Min Max Min Max Min Max  
Address Valid to  
Output Valid  
t
t
E = V , G = V  
80  
80  
40  
30  
30  
90  
90  
45  
30  
30  
100  
100  
50  
120  
120  
60  
ns  
ns  
ns  
ns  
ns  
ns  
AVQV  
ACC  
IL  
IL  
Chip Enable Low to  
Output Valid  
t
t
G = V  
IL  
ELQV  
CE  
Output Enable Low  
to Output Valid  
t
t
E = V  
IL  
GLQV  
OE  
Chip Enable High to  
Output Hi-Z  
(2)  
t
DF  
G = V  
IL  
0
0
0
0
0
0
0
0
0
30  
0
0
0
40  
t
t
EHQZ  
Output Enable High  
to Output Hi-Z  
(2)  
t
DF  
E = V  
IL  
30  
40  
GHQZ  
Address Transition  
to Output Transition  
t
t
E = V , G = V  
IL IL  
AXQX  
OH  
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .  
PP  
CC  
PP  
2. Sampled only, not 100% tested.  
Figure 5. Read Mode AC Waveforms  
VALID  
tGLQV  
VALID  
A0-A16  
tAVQV  
tAXQX  
E
tEHQZ  
tGHQZ  
G
tELQV  
Hi-Z  
Q0-Q7  
AI00713B  
System Considerations  
output control and by properly selected decoupling  
capacitors. It is recommended that a 0.1µF ceram-  
The power switching characteristics of Advanced  
CMOS EPROMs requirecareful decoupling of the  
devices. The supply current, I , has three seg-  
ic capacitor be used on every device between V  
CC  
and V . This should be a high frequency capaci-  
SS  
CC  
tor of low inherent inductance and should be  
placed as close to the device as possible. In addi-  
tion, a 4.7µF bulk electrolytic capacitor should be  
ments that are of interest to the system designer:  
the standby current level, the active current level,  
and transient current peaks that are produced by  
the falling and rising edges of E. The magnitude of  
the transient current peaks is dependent on the  
capacitive and inductive loading of the device at  
the output. The associated transient voltage peaks  
can be suppressed by complying with the two line  
used between V and V for every eight devic-  
CC  
SS  
es. The bulk capacitor should be located near the  
power supply connection point. The purpose of the  
bulk capacitor is to overcome the voltage drop  
caused by the inductive effects of PCB traces.  
6/17  

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