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LUPXA255A0C200 PDF预览

LUPXA255A0C200

更新时间: 2024-02-29 09:08:10
品牌 Logo 应用领域
英特尔 - INTEL 微控制器和处理器外围集成电路微处理器机械时钟
页数 文件大小 规格书
40页 1160K
描述
Electrical, Mechanical, and Thermal Specification

LUPXA255A0C200 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:BGA包装说明:BGA, BGA256,16X16,40
针数:256Reach Compliance Code:unknown
ECCN代码:3A001.A.2.CHTS代码:8542.31.00.01
风险等级:5.82Is Samacsys:N
地址总线宽度:26位大小:32
边界扫描:YES最大时钟频率:3.6864 MHz
外部数据总线宽度:32格式:FIXED POINT
集成缓存:YESJESD-30 代码:S-PBGA-B256
JESD-609代码:e1长度:17 mm
低功率模式:YES端子数量:256
最高工作温度:85 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA256,16X16,40封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):250
电源:1,2.5/3.3,3.3 V认证状态:Not Qualified
座面最大高度:2 mm速度:200 MHz
子类别:Microprocessors最大供电电压:1.1 V
最小供电电压:0.95 V标称供电电压:1 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:TIN SILVER COPPER
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:17 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR
Base Number Matches:1

LUPXA255A0C200 数据手册

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About This Document  
1.0  
About This Document  
This is the electrical, mechanical, and thermal specification data sheet for the Intel® PXA255  
Processor. This data sheet contains a functional overview, mechanical data, package signal  
locations, targeted electrical specifications (simulated), and bus functional waveforms. Detailed  
functional descriptions other than parametric performance is published in the Intel® PXA255  
Processor Developer's Manual. Refer to Table 1, “Related Documentation” for a list of documents  
that support the PXA255 processor.  
Table 1. Related Documentation  
Document Title  
Order / Contact  
Intel® PXA255 Processor Developer's Manual  
278693  
Intel® XScaleTM Microarchitecture for the PXA250 and PXA210 Applications  
Processors Developer's Manual  
278525  
278694  
Intel® PXA255 Processor Design Guide  
2.0  
Functional Overview  
The PXA255 processor provides high integration, high performance and low power consumption  
for portable handheld and handset devices. These processors incorporate the Intel® XScale™  
Microarchitecture based on the ARM* V5TE architecture. Refer to the Intel® XScale™  
Microarchitecture for the Intel® PXA250 and PXA210 Applications Processors Users Manual for  
implementation details, extensions, and options implemented by the XScale microarchitecture.  
The processor memory interface supports a variety of memory types that allow flexible design  
requirements. Hooks for connection to two companion chips permit glueless connection to external  
devices. An integrated LCD display controller supports displays and permits 1, 2, and 4-bit  
grayscale, and 8- or 16-bit color pixels. A 256-byte palette RAM provides flexible color mapping  
capabilities.  
A rich set of serial devices as well as general-system resources provide enough compute and  
connectivity capability for many applications. For details on the programming model and theory of  
operation of each of these units, refer to the Intel® PXA255 Processor Developer's Manual. For the  
processor block diagram, refer to Figure 1, “Processor Block Diagram” on page 8.  
Intel® PXA255 Processor Electrical, Mechanical, and Thermal Specification  
7

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