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LTM4639

更新时间： 2023-12-20 18:44:10
品牌 Logo 应用领域
亚德诺 - ADI 稳压器
页数 文件大小 规格书
32页 574K
描述
低 VIN、20A、DC/DC μModule 降压型稳压器

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LTM4639 数据手册

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LTM4639  
PIN FUNCTIONS  
PACKAGE ROW AND COLUMN LABELING MAY VARY  
OT_TEST (B9): Used for Test Purposes. Float this pin, or  
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE  
LAYOUT CAREFULLY.  
tie to V to disable overtemperature protection.  
IN  
f
(B12): A resistor can be applied from this pin to  
SET  
V
(A1-A6, B1-B6, C1-C6): Power Input Pins. Apply  
IN  
ground to set the operating frequency, or a DC voltage  
can be applied to set the frequency. See the Applications  
Information section.  
input voltage between these and GND pins. Recommend  
placing input decoupling capacitance directly between  
V and GND pins.  
IN  
TRACK/SS (A9): Output Voltage Tracking Pin and Soft-  
Start Inputs. The pin has a 1.2µA pull-up current source. A  
capacitor from this pin to ground will set a soft-start ramp  
rate. In tracking, the regulator output can be tracked to a  
differentvoltage.SeetheApplicationsInformationsection.  
V
(J1-J10, K1-K11, L1-L11, M1-M11): Power Output  
OUT  
Pins. Apply output load between these and GND pins.  
Recommend placing output decoupling capacitance  
between these pins and GND pins. Review Table 5. Output  
range 0.6V to 5.5V.  
V
(F12): The Negative Input of the Error Amplifier.  
FB  
GND (C7, C9, D1-D6, D8, E1-E5, E7, E9, F1-F5, F7-F9,  
G1-G9, H1-H9): Power Ground Pins for Both Input and  
Output.  
Internally, this pin is connected to V  
with a  
OUT_LCL  
60.4k precision resistor. Different output voltages can  
be programmed with an additional resistor between V  
FB  
and ground pins. In PolyPhase® operation, tying the  
PGOOD(F11,G12):OutputVoltagePowerGoodIndicator.  
Open-drain logic output is pulled to ground when the  
output voltage exceeds a 10% regulation window. Both  
pins are tied together internally.  
V
pins together allows for parallel operation. See the  
FB  
Applications Information section.  
COMPA (A11): Current Control Threshold and Error  
Amplifier Compensation Point. The current comparator  
threshold increases with this control voltage. Tie all  
COMP pins together for parallel operation. This pin can  
be compensated externally for optimized loop response  
or connected to the COMPB pin. See the Applications  
Information section.  
SGND (G11, H11, H12): Signal Ground Pin. Return  
ground path for all analog and low power circuitry. Tie a  
single connection to the output capacitor GND. See layout  
guidelines in Figure 21.  
+
TEMP (F6): Temperature Monitor. See Applications In-  
formation section.  
COMPB (A12): Default Compensation Network  
Corresponding to Table 5. Tie this pin to COMPA to use  
default compensation. See the Applications Information  
section.  
–
TEMP (E6): Kelvin Return of the Internal Temperature  
Monitor.  
MODE_PLLIN (A8): Forced Continuous Mode, Burst  
Mode Operation, or Pulse-Skipping Mode Selection Pin  
and External Synchronization Input to Phase Detector Pin.  
RUN(A10):RunControlPin.Avoltageabove1.4Vwillturn  
on the module. A 5.1V Zener diode to ground is internal to  
the module for limiting the voltage on the RUN pin to 5V  
Connect this pin to INTV to enable pulse-skipping mode.  
CC  
Connect to ground to enable forced continuous mode.  
FloatingthispinwillenableBurstModeoperation.Aclockon  
this pin will enable synchronization with forced continuous  
operation. See the Applications Information section.  
andallowingtheuseofapull-upresistortoV forenabling  
IN  
the device. Limit current into the RUN pin to ≤ 2mA.  
INTV (A7, D9): Internal 5V LDO for Driving the Control  
CC  
Circuitry and the Power MOSFET Drivers. Both pins are  
C
PWR  
(B7): Control Bias Input. Required to operate the  
LTM4639 regulator below 4.5V input. For V ≥4.5V up to  
internally connected. The 5V LDO has a 100mA current  
IN  
limit. INTV is controlled and enabled when RUN is  
CC  
7V connect C  
sequence V before C  
to V . To maintain soft-start function,  
PWR  
IN  
IN  
activated high. See Applications Section. This pin is an  
, then enable the RUN pin. If  
PWR  
output, do not drive this pin.  
the RUN pin has a pull-up resistor to V , then sequence  
IN  
C
after V .  
PWR  
IN  
4639f  
7
For more information www.linear.com/LTM4639  
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