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LTC3605AEUF#PBF

更新时间： 2024-01-11 07:08:45
品牌 Logo 应用领域
凌特 - Linear 开关
页数 文件大小 规格书
22页 414K
描述
LTC3605A - 20V, 5A Synchronous Step-Down Regulator; Package: QFN; Pins: 24; Temperature Range: -40°C to 85°C

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LTC3605AEUF#PBF 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active包装说明：HVQCCN,
针数：24Reach Compliance Code：compliant
风险等级：2.19模拟集成电路 - 其他类型：SWITCHING REGULATOR
控制模式：CURRENT-MODE最大输入电压：20 V
最小输入电压：4 V标称输入电压：12 V
JESD-30 代码：S-PQCC-N24JESD-609代码：e3
长度：4 mm功能数量：1
端子数量：24最高工作温度：125 °C
最低工作温度：-40 °C标称输出电压：3.3 V
封装主体材料：PLASTIC/EPOXY封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：0.8 mm
表面贴装：YES切换器配置：BUCK
最大切换频率：4000 kHz技术：CMOS
温度等级：AUTOMOTIVE端子面层：MATTE TIN
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4 mmBase Number Matches：1

LTC3605AEUF#PBF 数据手册

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LTC3605A  
elecTrical characTerisTics The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TJ ≈ TA = 25°C (Note 2). VIN = 12V unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
I
Positive Inductor Valley Current Limit  
Negative Inductor Valley Current Limit  
5
6
–5  
7.5  
A
A
LIM  
R
R
Top Power NMOS On-Resistance  
INTV = 3.3V  
70  
35  
150  
60  
mΩ  
mΩ  
TOP  
CC  
Bottom Power NMOS On-Resistance  
INTV = 3.3V  
CC  
BOTTOM  
UVLO  
V
V
V
INTV Undervoltage Lockout  
INTV Falling  
2.4  
2.6  
0.25  
2.8  
V
V
CC  
CC  
Threshold  
INTV Hysteresis (Rising)  
CC  
Run Threshold 2 (I ≥ 1mA)  
RUN Rising  
RUN Rising  
1.1  
0.45  
1.2  
0.6  
1.3  
0.75  
V
V
RUN  
Q
Run Threshold 1 (I ≥ 100µA)  
Q
Internal V Voltage  
4V < V < 20V  
3.2  
3.3  
0.5  
10  
3.4  
V
%
%
INTVCC  
CC  
IN  
DV  
INTV Load Regulation  
I
= 0mA to 20mA  
LOAD  
INTVCC  
CC  
OV  
Output Overvoltage  
PGOOD Upper Threshold  
V
FB  
V
FB  
V
FB  
Rising  
7
13  
–7  
UV  
Output Undervoltage  
PGOOD Lower Threshold  
Falling  
–13  
–10  
%
DV  
PGOOD Hysteresis  
Returning  
1.5  
12  
%
Ω
FB(HYS)  
PGOOD  
PGOOD  
TRACK/SS  
OSC  
R
PGOOD Pull-Down Resistance  
PGOOD Leakage  
25  
2
I
I
f
0.54V < V < 0.66V  
µA  
FB  
TRACK Pull-Up Current  
Oscillator Frequency  
CLKIN Threshold  
2.5  
1
4
µA  
l
R = 162k  
T
0.85  
1
1.2  
0.3  
MHz  
CLKIN  
CLKIN V  
CLKIN V  
V
V
IL  
IH  
V
V
Overvoltage Lockout Threshold  
V
IN  
V
IN  
Rising  
Falling  
22.8  
20.8  
23.5  
21.5  
24.2  
22.1  
V
V
VIN_OV  
IN  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. Exposure to any Absolute  
Maximum Rating condition for extended periods may affect device  
reliability and lifetime. Absolute Maximum Ratings are those values  
beyond which the life of a device may be impaired.  
Note 3: Dynamic supply current is higher due to the internal gate charge  
being delivered at the switching frequency.  
Note 4: The LTC3605A is tested in a feedback loop that adjusts V to  
FB  
achieve a specified error amplifier output voltage (ITH).  
Note 5: T is calculated from the ambient temperature T and  
J
A
Note 2: The LTC3605A is tested under pulsed load conditions such that  
power dissipation as follows: T = T + P • (37°C/W). See Thermal  
J
A
D
T ≈ T . The LTC3605AE (E-grade) is guaranteed to meet specifications  
J
A
Considerations section.  
from 0°C to 85°C junction temperature. Specifications over the –40°C  
to 125°C operating junction temperature range are assured by design,  
characterization and correlation with statistical process controls. The  
LTC3605AI (I-grade) is guaranteed over the full –40°C to 125°C operating  
temperature range.  
Note 6: This IC includes overtemperature protection that is intended  
to protect the device during momentary overload conditions. Junction  
temperature will exceed 125°C when overtemperature protection is active  
Continuous operation above the specified maximum operating junction  
temperature may impair device reliability.  
The junction temperature (T ) is calculated from the ambient temperature  
J
(T ) and power dissipation (P ) according to the formula:  
A
D
T = T + (P • θ °C/W)  
J
A
D
JA  
where θ is the package thermal impedance. Note that the maximum  
JA  
ambient temperature is determined by specific operating conditions  
in conjunction with board layout, the rated thermal package thermal  
resistance and other environmental factors.  
3605afg  
3
For more information www.linear.com/LTC3605A  
1234567...22

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