LTC1981/LTC1982
U
W U U
APPLICATIONS INFORMATION
Logic-Level MOSFET Switches
managed by the system regulator. R1 is required to
eliminate the possibility of parasitic MOSFET oscillations
duringswitchtransitions.Itisagoodpracticetoisolatethe
gates of paralleled MOSFETs with 1k resistors to decrease
the possibility of interaction between switches.
TheLTC1981/LTC1982aredesignedtooperatewithlogic-
levelN-channelMOSFETswitches.Althoughthereissome
variation among manufacturers, logic-level MOSFET
switchesaretypicallyratedwithVGS =4Vwithamaximum
continuous VGS rating of ±8V. RDS (ON) and maximum
3.3V
V
IN
LT1129-3.3
+
V
DS ratings are similar to standard MOSFETs and there is
3.3µF
generally little price differential. When operating at supply
voltages of 5V or greater, care must be taken when
selecting the MOSFET. The LTC1981/LTC1982 limit the
output voltage to between 6.9V and 7.5V. The VGS devel-
opedfortheMOSFETmaybetoolowtosufficientlyturnon
theMOSFET. MOSFETsratedat2.5V, orless, willbebetter
suited for applications where the supply voltages ap-
proach 5V.
R1
1k
V
CC
Si3442DV
GATE 1
1/2 LTC1982
SHDN 1
C1
0.1µF
+
3.3V
LOAD
C
L
ON/OFF
GND
100µF
1981/82 F01
Figure 1. Powering a Large Capactive Load
Mixed 5V/3V Systems
Powering Large Capacitive Loads
Because the input ESD protection diodes are referenced to
the GND pin instead of the supply pin, it is possible to drive
the LTC1981/LTC1982 inputs from 5V CMOS or TTL logic
even though the LTC1981/LTC1982 is powered from a
3.3V supply as shown in Figure 2. Likewise, because the
inputthresholdvoltagehighisnevergreaterthan1.6V, the
reverse situation is true. The LTC1981/LTC1982 can be
driven with 3V CMOS or TTL even when the supply to the
device is as high as 5V as shown in Figure 3.
Electrical subsystems in portable battery-powered equip-
ment are typically bypassed with large filter capacitors to
reduce supply transients and supply induced glitching. If
not properly powered however, these capacitors may
themselves become the source of supply glitching. For
example, if a 100µF capacitor is powered through a switch
with a slew rate of 0.1V/µs, the current during start-up is:
ISTART = C(∆V/∆t)
= (100 •10–6)(1 • 105)
= 10A
3.3V
V
CC
1/2 LTC1982
SHDN 1
Si3442DV
GATE 1
Obviously, this is too much current for the regulator (or
output capacitor) to supply and the output will glitch by as
much as a few volts.
5V
3.3V
LOAD
GND
1981/82 F02
The start up current can be substantially reduced by
limiting the slew rate at the gate of an N-channel as shown
inFigure1.ThegatedriveoutputoftheLTC1981/LTC1982
have an internal 30k resistor (15k LTC1981) in series with
each of the output gate drive pins (see Functional Block
Diagram). Therefore, it only needs an external 0.1µF
capacitor (0.22µF for the LTC1981) to create enough RC
delay to substantially slow the slew rate of the MOSFET
gate to approximately 0.6V/ms. Since the MOSFET is
operating as a source follower, the slew rate at the source
is essentially the same as that at the gate, reducing the
startup current to approximately 60mA which is easily
Figure 2. Direct Interface to 5V Logic
5V
V
Si3442DV
CC
1/2 LTC1982
SHDN 1
GATE 1
3.3V
5V
LOAD
GND
1981/82 F03
Figure 3. Direct Interface to 3.3V Logic
6
5秒后页面跳转
STM32F030C6芯片介绍：主要参数分析、引脚配置说明、功耗及封装
PCF8591数据手册解读：参数、引脚说明
一文带你了解ss8050参数、引脚配置、应用指南
深入解析AD7606高性能多通道模数转换器：资料手册参数分析
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
