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LTC1090AMJ PDF预览

LTC1090AMJ

更新时间: 2024-02-06 14:10:40
品牌 Logo 应用领域
凌特 - Linear 转换器模数转换器
页数 文件大小 规格书
28页 343K
描述
Single Chip 10-Bit Data Acquisition System

LTC1090AMJ 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP20,.3
针数:20Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.75最大模拟输入电压:5.05 V
最小模拟输入电压:-5.05 V转换器类型:ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码:R-GDIP-T20JESD-609代码:e0
最大线性误差 (EL):0.0488%标称负供电电压:-5 V
模拟输入通道数量:8位数:10
功能数量:1端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出位码:BINARY输出格式:SERIAL
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP20,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5,GND/-5 V认证状态:Not Qualified
采样速率:0.045 MHz采样并保持/跟踪并保持:SAMPLE
座面最大高度:5.08 mm子类别:Analog to Digital Converters
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

LTC1090AMJ 数据手册

 浏览型号LTC1090AMJ的Datasheet PDF文件第1页浏览型号LTC1090AMJ的Datasheet PDF文件第2页浏览型号LTC1090AMJ的Datasheet PDF文件第3页浏览型号LTC1090AMJ的Datasheet PDF文件第5页浏览型号LTC1090AMJ的Datasheet PDF文件第6页浏览型号LTC1090AMJ的Datasheet PDF文件第7页 
LTC1090  
U
DIGITAL A DDCELECTRICALCHARACTERISTICS  
The denotes specifications which apply  
over the full operating temperature range, otherwise specification are TA = 25°C. (Note 3)  
LTC1090/LTC1090A  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
V
V
High Level lnput Voltage  
Low Level Input Voltage  
High Level lnput Current  
Low Level Input Current  
High Level Output Voltage  
V
V
V
V
= 5.25V  
= 4.75V  
2.0  
IH  
IL  
CC  
CC  
IN  
0.8  
2.5  
V
I
I
= V  
µA  
µA  
IH  
IL  
CC  
= 0V  
–2.5  
IN  
V
V
V
= 4.75V, l = 10µA  
= 4.75V, l = 360µA  
4.7  
4.0  
V
V
OH  
CC  
CC  
O
O
2.4  
V
Low Level Output Voltage  
Hi-Z Output Leakage  
V
= 4.75V, l = 1.6mA  
0.4  
V
OL  
CC  
O
I
V
V
= V , CS High  
3
–3  
µA  
µA  
OZ  
OUT  
OUT  
CC  
= 0V, CS High  
I
I
I
I
I
Output Source Current  
Output Sink Current  
Positive Supply Current  
Reference Current  
V
V
= 0V  
–10  
10  
mA  
mA  
mA  
mA  
µA  
SOURCE  
SINK  
CC  
OUT  
OUT  
= V  
CC  
+
CS High, REF Open  
= 5V  
1.0  
0.5  
1
2.5  
1.0  
50  
V
REF  
REF  
Negative Supply Current  
CS High, V = 5V  
Note 1: Absolute Maximum Ratings are those values beyond which the life  
of a device may be impaired.  
below V or one diode drop above V . Be careful during testing at low  
CC  
V
levels (4.5V), as high level reference or analog inputs (5V) can cause  
CC  
Note 2: All voltage values are with respect to ground with DGND, AGND  
this input diode to conduct, especially at elevated temperatures, and cause  
errors for inputs near full-scale. This spec allows 50mV forward bias of  
either diode. This means that as long as the reference or analog input does  
not exceed the supply voltage by more than 50mV, the output code will be  
correct. To achieve an absolute 0V to 5V input voltage range will therefore  
require a minimum supply voltage of 4.950V over initial tolerance,  
temperature variations and loading.  
and REF wired together (unless otherwise noted).  
Note 3: V = 5V, V + = 5V, V – = 0V, V = 0V for unipolar mode and  
CC  
REF  
REF  
–5V for bipolar mode, ACLK = 2.0MHz, SCLK = 0.5MHz unless otherwise  
specified.  
Note 4: These specs apply for both unipolar and bipolar modes. In bipolar  
mode, one LSB is equal to the bipolar input span (2V ) divided by 1024.  
REF  
For example, when V = 5V, 1LSB (bipolar) = 2(5V)/1024 = 9.77mV.  
Note 5: Linearity error is specified between the actual end points of the  
A/D transfer curve.  
Note 6: Total unadjusted error includes offset, gain, linearity, multiplexer  
and hold step errors.  
Note 7: Two on-chip diodes are tied to each reference and analog input  
which will conduct for reference or analog input voltages one diode drop  
REF  
Note 8: Channel leakage current is measured after the channel selection.  
Note 9: To minimize errors caused by noise at the chip select input, the  
internal circuitry waits for two ACLK falling edges after a chip select falling  
edge is detected before responding to control input signals. Therefore, no  
attempt should be made to clock an address in or data out until the  
minimum chip select setup time has elapsed.  
1090fc  
4

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