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LTC1069-1 PDF预览

LTC1069-1

更新时间: 2022-11-25 12:22:29
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
8页 242K
描述
Low Power, 8th Order Progressive Elliptic, Lowpass Filter

LTC1069-1 数据手册

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LTC1069-1  
U W  
TYPICAL PERFORMANCE CHARACTERISTICS  
Output Voltage Swing vs  
Temperature  
Supply Current vs Clock  
Supply Current vs Supply Voltage  
Frequency  
5
4
3
2
1
0
5
4
f
= 10Hz  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
CLK  
V
= ±5V  
S
3
V
= ±2.5V  
S
V
= ±5V  
S
2
25°C  
1
V
= ±1.57V  
= ±1.57V  
S
0
85°C  
–40°C  
V
S
V
= 5V  
S
–1  
–2  
–3  
–4  
–5  
V
= ±2.5V  
S
V
= 3.3V  
S
V
= ±5V  
S
–40 –20  
0
20  
40  
60  
80  
0.5  
0.6 0.7 0.8 0.9 1.0 1.2  
0.1  
0.4  
0
1
3
4
5
6
0.2 0.3  
2
TOTAL SUPPLY VOLTAGE (±V)  
CLOCK FREQUENCY (MHz)  
AMBIENT TEMPERATURE (°C)  
1069-1 G15  
1069-1 G14  
1069-1 G13  
U
U
U
PIN FUNCTIONS  
V+, V(Pins 2, 7): Power Supply Pins. The V+ (Pin 2) and  
the V(Pin 7) should be bypassed with a 0.1µF capacitor  
to an adequate analog ground. The filter’s power supplies  
should be isolated from other digital or high voltage  
analog supplies. A low noise linear supply is recom-  
mended. Using switching power supplies will lower the  
signal-to-noise ratio of the filter. Unlike previous mono-  
lithic filters, the power supplies can be applied at any  
order, that is, the positive supply can be applied before the  
negative supply and vice versa. Figure 2 shows the con-  
nection for dual supply operation.  
AGND (Pin 1): Analog Ground. The quality of the analog  
signal ground can affect the filter performance. For either  
single or dual supply operation, an analog ground plane  
surrounding the package is recommended. The analog  
ground plane should be connected to any digital ground at  
a single point. For dual supply operation Pin 1 should be  
connected to the analog ground plane.  
For single supply operation Pin 1 should be bypassed to the  
analog ground plane with a 0.47µF or larger capacitor. An  
internal resistive divider biases Pin 1 to 1/2 the total power  
supply. Pin 1 should be buffered if used to bias other ICs.  
Figure1showstheconnectionsforsinglesupplyoperation.  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
AGND  
V
V
OUT  
AGND  
V
V
OUT  
OUT  
OUT  
0.47µF  
+
+
+
+
V
V
V
V
V
V
V
LTC1069-1  
LTC1069-1  
0.1µF  
0.1µF  
0.1µF  
NC  
NC  
NC  
NC  
V
V
CLK  
V
IN  
V
CLK  
IN  
IN  
IN  
ANALOG GROUND PLANE  
ANALOG GROUND PLANE  
STAR  
SYSTEM  
GROUND  
DIGITAL  
GROUND  
PLANE  
STAR  
SYSTEM  
GROUND  
DIGITAL  
GROUND  
PLANE  
1k  
1k  
CLOCK  
SOURCE  
CLOCK  
SOURCE  
1069-1 F01  
1069-1 F02  
Figure 2. Connections for Dual Supply Operation  
Figure 1. Connections for Single Supply Operation  
5

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