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LTC1069-1 PDF预览

LTC1069-1

更新时间： 2023-12-20 18:45:14
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
10页 141K
描述
低功率、8 阶渐进式椭圆、低通滤波器

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LTC1069-1 数据手册

 浏览型号LTC1069-1的Datasheet PDF文件第1页浏览型号LTC1069-1的Datasheet PDF文件第2页浏览型号LTC1069-1的Datasheet PDF文件第4页浏览型号LTC1069-1的Datasheet PDF文件第5页浏览型号LTC1069-1的Datasheet PDF文件第6页浏览型号LTC1069-1的Datasheet PDF文件第7页 
LTC1069-1  
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. fCUTOFF is the filter’s cutoff frequency and is equal to fCLK/100. The  
fCLK signal level is TTL or CMOS (clock rise or fall time ≤ 1μs), VS = 3.3V to 5V, RL = 10k, unless otherwise noted. All AC gains are  
measured relative to the passband gain.  
PARAMETER  
CONDITIONS  
V = 5V, f = 500kHz  
CLK  
MIN  
TYP  
MAX  
UNITS  
Gain at 0.50f  
–0.10  
–0.11  
–0.03  
0.10  
0.11  
dB  
dB  
CUTOFF  
CUTOFF  
CUTOFF  
CUTOFF  
S
l
l
l
l
l
l
l
l
l
l
l
l
l
l
f
= 2.5kHz, V = 1V  
IN RMS  
TEST  
V = 3.3V, f  
TEST  
= 200kHz  
CLK  
–0.10  
–0.11  
–0.03  
0.04  
0.10  
0.11  
dB  
dB  
S
f
= 1kHz, V = 0.5V  
IN RMS  
Gain at 0.75f  
Gain at 0.90f  
Gain at 0.95f  
V = 5V, f  
TEST  
= 500kHz  
CLK  
–0.20  
–0.25  
0.20  
0.25  
dB  
dB  
S
f
= 3.75kHz, V = 1V  
IN RMS  
V = 3.3V, f  
TEST  
= 200kHz  
CLK  
–0.20  
–0.25  
0.04  
0.20  
0.25  
dB  
dB  
S
f
= 1.5kHz, V = 0.5V  
IN RMS  
V = 5V, f  
TEST  
= 500kHz  
CLK  
–0.20  
–0.25  
–0.01  
–0.01  
–0.05  
–0.04  
–0.70  
–0.61  
–27  
0.20  
0.25  
dB  
dB  
S
f
= 4.5kHz, V = 1V  
IN RMS  
V = 3.3V, f  
TEST  
= 200kHz  
CLK  
–0.20  
–0.25  
0.20  
0.25  
dB  
dB  
S
f
= 1.8kHz, V = 0.5V  
IN  
RMS  
RMS  
V = 5V, f  
TEST  
= 500kHz  
CLK  
–0.30  
–0.35  
0.30  
0.35  
dB  
dB  
S
f
= 4.75kHz, V = 1V  
IN  
V = 3.3V, f  
TEST  
= 200kHz  
CLK  
–0.30  
–0.35  
0.30  
0.35  
dB  
dB  
S
f
= 1.9kHz, V = 0.5V  
IN RMS  
Gain at f  
V = 5V, f = 500kHz  
CLK  
–1.25  
–1.35  
–0.25  
–0.15  
dB  
dB  
CUTOFF  
S
TEST  
f
= 5.0kHz, V = 1V  
IN RMS  
V = 3.3V, f  
TEST  
= 200kHz  
CLK  
–1.25  
–1.35  
–0.25  
–0.15  
dB  
dB  
S
f
= 2.0kHz, V = 0.5V  
IN  
RMS  
RMS  
Gain at 1.25f  
V = 5V, f = 500kHz  
CLK  
–30  
–31  
–25  
–24  
dB  
dB  
CUTOFF  
CUTOFF  
S
TEST  
f
= 6.25kHz, V = 1V  
IN  
V = 3.3V, f  
TEST  
= 200kHz  
CLK  
–30  
–31  
–27  
–25  
–24  
dB  
dB  
S
f
= 2.5kHz, V = 0.5V  
IN RMS  
Gain at 1.50f  
V = 5V, f  
TEST  
= 500kHz  
CLK  
–58  
–59  
–53  
–50  
–49  
dB  
dB  
S
f
= 7.5kHz, V = 1V  
IN RMS  
V = 3.3V, f  
TEST  
= 200kHz  
CLK  
–58  
–59  
–53  
–50  
–49  
dB  
dB  
S
f
= 3kHz, V = 0.5V  
IN RMS  
Output DC Offset (Input at AGND)  
Output Voltage Swing  
V = 5V, f  
= 500kHz  
CLK  
30  
20  
15  
150  
mV  
mV  
mV  
S
V = 4.75V, f  
= 400kHz  
S
CLK  
V = 3.3V, f  
= 200kHz  
100  
S
CLK  
l
l
l
V = 5V  
–3.25  
–1.50  
–0.70  
4.0  
1.7  
0.9  
3.25  
1.25  
0.60  
V
V
V
S
V = 4.75V  
S
V = 3.3V  
S
l
l
l
Power Supply Current  
V = 5V, f  
= 500kHz  
3.8  
2.5  
2.0  
5.5  
4.5  
3.5  
mA  
mA  
mA  
S
CLK  
V = 4.75V, f  
= 400kHz  
CLK  
S
V = 3.3V, f  
= 200kHz  
CLK  
S
Maximum Clock Frequency  
V = 5V  
1.2  
0.8  
0.5  
MHz  
MHz  
MHz  
S
V = 4.75V  
S
V = 3.3V  
S
Input Frequency Range  
Input Resistance  
0
f
/2  
MHz  
kΩ  
V
CLK  
30  
43  
70  
Operating Power Supply Voltage  
1.57  
5.5  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. Exposure to any Absolute  
Maximum Rating condition for extended periods may affect device  
reliability and lifetime.  
10691fa  
3
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