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LTC1065IN8 PDF预览

LTC1065IN8

更新时间: 2024-01-11 06:32:59
品牌 Logo 应用领域
凌特 - Linear 时钟
页数 文件大小 规格书
16页 247K
描述
DC Accurate, Clock-Tunable Linear Phase 5th Order Bessel Lowpass Filter

LTC1065IN8 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:DIP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.26有源滤波器类型:SWITCHED CAPACITOR FILTER
中心频率或截止频率最大范围:50 kHzJESD-30 代码:R-PDIP-T8
JESD-609代码:e3负电源电压最大值(Vsup):-8 V
负电源电压最小值(Vsup):-2.375 V标称负供电电压 (Vsup):-5 V
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED极和零点:5 AND 0
认证状态:Not Qualified响应:LOWPASS
最大供电电压 (Vsup):8 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):5 V表面贴装:NO
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
传递特性:BESSEL宽度:7.62 mm

LTC1065IN8 数据手册

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LTC1065  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Transient Response  
Group Delay  
45  
40  
35  
30  
25  
20  
15  
10  
5
V
= ±5V  
S
f
= 10kHz  
C
0
12  
HORIZONTAL: 0.1ms/DIV, VERTICAL: 2V/DIV  
0
6
9
15  
18  
21  
3
V
S = ±5V, fC = 10kHz, VIN = 1kHz ± 3VP  
INPUT FREQUENCY (kHz)  
1065 G17  
SQUARE WAVE  
1065 G16  
U
U
U
PI FU CTIO S  
degrade DC offset and it will increase clock feedthrough,  
noise and distortion.  
Power Supply Pins (Pins 6, 3, N Package)  
The positive and negative supply pin should be bypassed  
withahighquality0.1µFceramiccapacitor.Inapplications  
where the clock pin (5) is externally swept to provide  
several cutoff frequencies, the output DC offset variation  
is minimized by connecting an additional 1µF solid tanta-  
lum capacitor in parallel with the 0.1µF disc ceramic. This  
technique was used to generate the graphs of the output  
DC offset variation versus clock; they are illustrated in the  
Typical Performance Characteristics section.  
A small amount of AC current flows out of the ground pin  
whether or not the internal oscillator is used. The fre-  
quency of the ground current equals the frequency of the  
clock. The average value of this current is approximately  
55µA, 110µA, 170µA for ±2.5V, ±5V and ±7.5V supplies  
respectively.  
For single supply operation, the ground pin should be  
preferablybiasedathalfsupply(seeTypicalApplications).  
When the power supply voltage exceeds ±7V, and when  
Vis applied before V+ (if V+ is allowed to go below  
ground) connect a signal diode between the positive  
supply pin and ground to prevent latch-up (see Typical  
Applications).  
VOS Adjust Pin (Pin 8, N Package)  
The VOS adjust pin can be used to trim any small amount  
ofoutputDCoffsetvoltageortointroduceadesiredoutput  
DC level. The DC gain from the VOS adjust pin to the filter  
output pin equals two.  
Ground Pin (Pin 2, N Package)  
Any DC voltage applied to this pin will reflect at the output  
pin of the filter multiplied by two.  
The ground pin merges the internal analog and digital  
ground paths. The potential of the ground pin is the  
reference for the internal switched-capacitor resistors,  
and the reference for the external clock. The positive input  
of the internal op amp is also tied to the ground pin.  
If the VOS adjust pin is not used, it should be shorted to the  
groundpin.TheDCbiascurrentflowingintotheVOS adjust  
pin is typically 10pA.  
The VOS adjust pin should always be connected to an AC  
ground;ACsignalsappliedtothispinwilldegradethefilter  
response.  
For dual supply operation, the ground pin should be  
connected to a high quality AC and DC ground. A ground  
plane, if possible, should be used. A poor ground will  
1065fb  
6

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